The RP2350 Paradigm: Why Migrate Your Legacy Code?

The transition from the original RP2040 to the RP2350 chip marks a significant leap in microcontroller architecture. For engineers and makers managing a portfolio of embedded devices, upgrading to Raspberry Pi Pico 2 projects is not merely a matter of swapping out the physical board. It requires a deliberate platform migration strategy to account for new memory topologies, expanded Programmable I/O (PIO) capabilities, and the introduction of dual-architecture processing (Arm Cortex-M33 and RISC-V). While the Raspberry Pi foundation has maintained exceptional backward compatibility, naive drop-in replacements can lead to suboptimal performance or hard-to-trace memory faults. This guide provides a deep-dive technical roadmap for migrating your existing C/C++ and MicroPython codebases to the RP2350 silicon.

Silicon and Architecture Shifts: RP2040 vs. RP2350

Before altering your build scripts, it is critical to understand the underlying hardware deltas. The RP2350 introduces a banked SRAM architecture and fixes several hardware-level errata present in the original RP2040. Below is a structural comparison of the two silicon revisions.

Feature RP2040 (Pico 1) RP2350 (Pico 2) Migration Impact
Processor Cores Dual Arm Cortex-M0+ @ 133MHz Dual Arm Cortex-M33 @ 150MHz OR Dual Hazard3 RISC-V Requires CMake architecture targeting; DSP instructions now available on M33.
SRAM 264 KB (4 banks) 520 KB (Banked/Striped) DMA and memory-mapped peripherals require updated striping configurations.
Flash Storage 2 MB QSPI 8 MB QSPI (Standard on Pico 2) Requires updating linker scripts and flash offset definitions.
PIO Blocks 2 Blocks (8 State Machines) 3 Blocks (12 State Machines) Allows offloading more concurrent protocols (e.g., I2S + WS2812 + UART).
ADC Performance 12-bit (Subject to Errata E9) 12-bit (Errata Fixed, improved ENOB) Analog sensor projects can now sample at higher rates without crosstalk noise.
Security None (Basic Bootrom) Secure Boot, OTP, Arm TrustZone Enables commercial IP protection and encrypted firmware updates.

For a comprehensive look at the silicon specifications, refer to the official Raspberry Pi Microcontroller Documentation.

C/C++ SDK Porting: CMake and Memory Maps

The most substantial friction point in migrating C/C++ Raspberry Pi Pico 2 projects lies in the build system. The Pico SDK version 2.0.0 introduced a unified build pipeline that supports both the RP2040 and RP2350, but it requires explicit platform targeting.

1. Updating CMakeLists.txt

In your legacy RP2040 projects, the SDK implicitly targeted the Cortex-M0+. For the Pico 2, you must define the PICO_PLATFORM variable. You can choose between the Arm and RISC-V cores depending on your project's computational needs.

To target the Arm Cortex-M33 (recommended for DSP-heavy audio or motor control projects due to the M33's single-cycle multiplier and DSP extensions), set your environment or CMake cache variable:

set(PICO_PLATFORM rp2350-arm-s)

If you are experimenting with the open-source Hazard3 RISC-V architecture, use:

set(PICO_PLATFORM rp2350-riscv)

Note: The '-s' denotes the inclusion of the security and floating-point extensions native to the RP2350 Arm build.

2. Navigating the 520KB Banked SRAM

The RP2040 featured a flat, contiguous 264KB SRAM space. The RP2350 expands this to 520KB, but it is divided into multiple banks with specific striping rules to prevent bus contention between the two cores and the DMA controller. If your legacy code relies on hardcoded memory addresses or custom linker scripts (memmap_default.ld), these will fail to compile or cause hard faults. You must migrate to the SDK's standard memory allocation APIs, such as malloc() or the SDK's RP2040/2350 specific heap wrappers, allowing the bootrom to map the banked SRAM correctly at runtime.

MicroPython and CircuitPython Adjustments

For developers building rapid prototypes or IoT edge nodes, MicroPython is the environment of choice. Migrating MicroPython-based Raspberry Pi Pico 2 projects is largely seamless at the syntax level, but the firmware binaries are strictly divergent.

  • Firmware Selection: You must flash the specific rp2350 UF2 firmware. Flashing an RP2040 UF2 to a Pico 2 will result in a boot failure, though the board will safely fall back into BOOTSEL mode.
  • Module Changes: The rp2 module has been updated to expose the third PIO block. State machine initialization now accepts block IDs 0, 1, and 2. Legacy code hardcoded to PIO(0) and PIO(1) will continue to work, but you are leaving 33% of your new PIO capacity on the table.
  • Memory Constraints: While total SRAM has doubled, the default MicroPython heap allocation may not automatically scale to utilize the full 520KB in older firmware builds. Ensure you are using the latest stable release from the official MicroPython Pico 2 download page to leverage the expanded garbage collection heap.

Exploiting the Expanded PIO and Fixed ADC

Two hardware features make migrating to the RP2350 highly compelling for specific niches: the expanded PIO and the corrected Analog-to-Digital Converter.

The Third PIO Block

The Programmable I/O subsystem is the crown jewel of the Raspberry Pi silicon. The RP2040 provided 8 state machines across 2 blocks. The RP2350 provides 12 state machines across 3 blocks. If your legacy project involved complex bit-banging—such as simultaneously driving a VGA output, reading a rotary encoder, and managing a WS2812 LED matrix—you likely hit the 8-SM ceiling. Migration allows you to isolate these protocols into PIO2, freeing up instruction memory (which is also expanded to 32 instructions per block) and reducing cross-block FIFO latency.

The ADC Errata Fix

The original RP2040 suffered from a well-documented hardware errata (E9) where the ADC exhibited poor Effective Number of Bits (ENOB) and severe crosstalk when sampling certain GPIO pins at high frequencies. Many precision analog projects required external I2C/SPI ADCs (like the ADS1115) to bypass this flaw. The RP2350 completely resolves this analog front-end bug. When migrating data-logging or audio-sampling projects, you can now confidently remove external ADC components, relying on the internal 12-bit ADC to deliver clean, high-speed samples directly from the GPIO pins, drastically reducing BOM costs and PCB footprint.

Security: Secure Boot and OTP

For commercial Raspberry Pi Pico 2 projects, the RP2350 introduces a robust security model previously absent in the pico ecosystem. The chip features a One-Time Programmable (OTP) memory region and supports Secure Boot via Arm TrustZone. If you are migrating a consumer product, you can now cryptographically sign your firmware binaries. The RP2350 bootrom will verify the signature against public keys burned into the OTP before executing the code. This prevents unauthorized cloning and protects your proprietary IP from being read back via the SWD (Serial Wire Debug) interface. Implementing this requires integrating the picotool signing utilities into your CI/CD pipeline.

Real-World Migration Checklist

Before pushing your migrated codebase to production, run through this hardware and software verification checklist:

  1. Update SDK: Ensure your local environment is running Pico SDK 2.0.0 or newer.
  2. Verify Linker Scripts: Remove any custom RP2040 memory maps; rely on the SDK's dynamic RP2350 memory mapping.
  3. Audit DMA Channels: The RP2350 features 16 DMA channels (up from 12). Update any hardcoded DMA channel assignments to use the SDK's dma_claim_unused_channel() API.
  4. Check Clock Trees: The RP2350 utilizes a new clock tree architecture. Verify that your USB and ADC clock dividers are configured using the updated clocks API rather than direct register manipulation.
  5. Test Deep Sleep: The RP2350 includes advanced power gating. Test your dormant and sleep modes, as wake-up source routing has been expanded to include more GPIO interrupts.

Conclusion

Migrating to Raspberry Pi Pico 2 projects is a strategic upgrade that unlocks higher clock speeds, double the memory, and enterprise-grade security. While the C/C++ build system requires explicit architecture targeting and an understanding of the new banked SRAM topology, the payoff in performance and BOM reduction—particularly regarding the fixed ADC and expanded PIO—makes the migration effort highly worthwhile. By methodically updating your CMake configurations and leveraging the RP2350's unique hardware features, you can future-proof your embedded platforms for the next generation of edge computing.