When you are sizing a breaker for a 120V AC branch circuit, you grab a standard thermal-magnetic breaker and move on. But when you are protecting a 12V LiFePO4 battery bank, a 24V DC solar array, or a bench power supply, standard thermal breakers are a liability. A DC electronic circuit breaker schematic uses a current shunt, a comparator (like the LM358), and a power MOSFET to interrupt overcurrent faults in microseconds, outperforming thermal breakers in low-voltage DC applications. If you need to protect a 12V or 24V DC system under 30A, this solid-state SCR-latched topology is your default choice.

The DC Electronic Circuit Breaker Schematic: Topology and Node Map

Standard thermal-magnetic breakers rely on a bimetallic strip heating up (I²t) to trip an overcurrent fault. In 12V or 24V DC systems, a massive 50A fault might not generate enough localized heat to trip a standard thermal element before your 12 AWG wire insulation melts. Furthermore, DC arcs lack the natural zero-crossing of AC waveforms, making arc extinguishing inside a standard breaker chamber highly unreliable. For a deep dive into why AC-rated breakers fail in DC applications, refer to the NFPA NEC Article 240 guidelines on overcurrent protection, which heavily assume AC zero-crossing for standard listed devices.

To solve this, we use a solid-state low-side N-channel MOSFET topology with an SCR (Silicon Controlled Rectifier) latch. Here is the node map for the schematic:

  • Node 1 (V_BATT+): 12V/24V DC Source positive terminal.
  • Node 2 (LOAD+): Connects directly to V_BATT+ and the load's positive terminal.
  • Node 3 (LOAD-): Load's negative terminal, connects to the MOSFET Drain.
  • Node 4 (V_SENSE): The high-side of the shunt resistor (MOSFET Source). Feeds the Op-Amp non-inverting input (+).
  • Node 5 (V_REF): Voltage divider setpoint. Feeds the Op-Amp inverting input (-).
  • Node 6 (GATE_DRIVE): The MOSFET Gate, pulled high to V_BATT+ via a 1kΩ resistor, and connected to the SCR Anode.
  • Node 7 (GND): Common ground for the source, shunt low-side, SCR Cathode, and Op-Amp V-.
Safety Caveat: Solid-state switches can fail in a short-circuit state (drain-to-source punch-through) during a catastrophic thermal event. You must always place a standard physical automotive blade fuse (e.g., 20A) in series with V_BATT+ as a secondary backup. The electronic breaker handles fast, repetitive micro-faults; the physical fuse handles apocalyptic MOSFET failures.

Component Selection and Design Walkthrough

Let's design this circuit for a 12V nominal system with a 10A continuous load and a hard 15A trip point. Here are the exact component values and the math behind them.

1. The Current Shunt (R_sense)

We need a voltage signal proportional to the load current. We will use a 0.01Ω, 5W power shunt resistor. At our 15A trip point, the voltage drop across the shunt is V = I × R, which equals 15A × 0.01Ω = 150mV. The power dissipated is P = I²R, or 225 × 0.01 = 2.25W. Using a 5W rated resistor gives us a >50% derating margin, keeping the shunt cool and preventing thermal drift in our resistance value.

2. The Comparator and Reference (LM358)

The LM358 dual op-amp is ideal here because it can operate on a single supply and its inputs can handle voltages down to the negative rail (GND). We need a stable 150mV reference for the inverting input (-). Use a 10kΩ linear potentiometer connected between a regulated 5V source (via an LM7805 LDO) and GND. Dial the wiper to exactly 150mV using your multimeter. This sets your precise 15A trip threshold.

3. The Latching Mechanism (C106B SCR)

If the op-amp simply turned the MOSFET off during a fault, the load current would drop to zero, the shunt voltage would fall below 150mV, and the op-amp would immediately turn the MOSFET back on, creating a high-frequency oscillation that would destroy your load. We use a C106B SCR to latch the fault state. When the op-amp output goes high, it triggers the SCR gate. The SCR conducts, pulling the MOSFET gate to GND and turning it off. The SCR remains latched ON until you physically cycle the power or press a reset pushbutton across the SCR Anode and Cathode.

4. The Power Switch (IRLB3034 N-Channel MOSFET)

For the low-side switch, we use the IRLB3034. It has an exceptionally low Rds(on) of 1.9mΩ at 10V Vgs. At 15A, the power dissipation is just 0.42W (225 × 0.0019). This means it will run cool without a heatsink under normal conditions. The Gate is pulled to V_BATT+ (12V) via a 1kΩ resistor. When the SCR fires, the 1kΩ resistor provides 12mA of holding current (12V / 1000Ω), which easily exceeds the C106B's 5mA minimum holding current requirement, ensuring the breaker stays tripped.

Behavior Matrix: How the Circuit Reacts to Faults

Understanding failure modes is what separates a hobbyist sketch from a reliable protection circuit. Here is how the topology behaves when individual elements fail or reach extremes.

Element Changed / Fault Circuit Response System Consequence Recovery / Mitigation
Overcurrent (Load > 15A) V_sense exceeds 150mV. Op-amp fires SCR. MOSFET Gate pulled to GND. Load disconnected in <10µs. Breaker latches OFF. Clear fault, press reset button or cycle power.
Shunt Resistor Opens V_sense drops to 0V. Op-amp output stays low. Breaker is defeated; will never trip on overcurrent. Use a Kelvin connection for shunt wiring to detect open traces.
Shunt Resistor Shorts V_sense drops to 0V. Op-amp output stays low. Breaker is defeated; infinite current passes until backup fuse blows. Ensure shunt is a dedicated component, not just PCB trace resistance.
SCR Gate Opens (Trace break) Op-amp output swings high, but cannot trigger SCR. MOSFET stays ON. Breaker fails to trip. Keep gate drive trace short and thick; add a physical backup fuse.
MOSFET Drain-Source Short Catastrophic silicon failure. Load sees full V_BATT+ regardless of Gate. Wires melt or catch fire if unprotected. Series 20A automotive blade fuse blows, clearing the hard short.

Breadboard Testing and Verification Steps

Do not connect this directly to your $800 LiFePO4 battery bank on the first try. Follow this step-by-step breadboard verification sequence to validate the trip logic safely.

  1. Build the Logic Stage First: Populate the LM358, the 10kΩ V_ref potentiometer, and the C106B SCR on your breadboard. Do not install the IRLB3034 MOSFET yet. Connect an LED (with a 330Ω series resistor) from V_BATT+ to the SCR Anode to simulate the Gate pull-down.
  2. Inject a Simulated Shunt Voltage: Use a secondary bench power supply and a voltage divider to inject a variable 0-200mV signal into the Op-Amp's non-inverting input (Node 4). Set V_ref to exactly 150mV.
  3. Verify the Latch: Slowly increase the injected voltage. At 150mV, the LED should instantly illuminate and stay illuminated even if you drop the injected voltage back to 0mV. This confirms the SCR holding current is sufficient and the latch works.
  4. Integrate the Power Stage: Remove the LED. Install the IRLB3034 and the 0.01Ω shunt. Connect a dummy load, such as a 12V 50W halogen bulb or a high-wattage power resistor, to the output.
  5. Induce a Hard Short: Connect an oscilloscope probe across the shunt resistor. Use a heavy-gauge jumper wire to momentarily short the load output to GND. The scope should show the shunt voltage spike and collapse back to zero in under 10 microseconds. If it oscillates, your SCR holding current is too low; drop the Gate pull-up resistor from 1kΩ to 470Ω.
Bench Tip: When testing the hard short, use a momentary pushbutton switch rated for 30A to initiate the short, rather than hand-slapping a jumper wire. This prevents contact bounce from masking the true trip speed on your oscilloscope.

Decision Tree: Choosing Your Breaker Topology

Not every application requires a discrete breadboarded schematic. Use this decision matrix to determine if this SCR-latched MOSFET design is the right fit, or if you should pivot to an alternative topology. For more on modern integrated alternatives, review Texas Instruments' overview on eFuse and solid-state breaker topologies.

System Parameter Recommended Topology Concrete Component Pick
>50V AC (Mains, 120V/240V) Thermal-Magnetic Mechanical Breaker Square D QO120 (20A, 120/240V AC)
12V-48V DC, <30A (Solar, Bench, Auto) Discrete SCR-Latched N-Channel MOSFET (This Design) IRLB3034 + C106B + LM358
12V-48V DC, 30A-80A (Large Inverters) Integrated eFuse IC with Fault Blanking TI TPS2596 (Programmable up to 80A)
>100V DC, High Current (EV, Telecom) High-Voltage DC Contactor + Shunt Trip Relay Gigavac GX14 (Contactor) + Hall Effect Sensor

The Final Verdict: If you are building a 12V or 24V DC distribution board for a van build, solar shed, or bench supply handling under 30A, build the discrete SCR-latched IRLB3034 topology detailed above. It costs under $4 in components, trips in microseconds, and avoids the dangerous DC arcing inherent in cheap, repurposed AC thermal breakers. If your current exceeds 30A, abandon the discrete MOSFET approach and buy a dedicated TI TPS2596 eFuse evaluation module to handle the thermal management and gate-drive complexities of high-current solid-state switching.