The LC circuit formula, \( f_r = \frac{1}{2\pi\sqrt{LC}} \), calculates the exact frequency where inductive reactance (\(X_L\)) and capacitive reactance (\(X_C\)) cancel each other out. For a 100 kHz parallel tank circuit, selecting \(L = 2.5\text{ mH}\) and \(C = 1\text{ nF}\) yields a theoretical resonance of 100.66 kHz. But on a physical breadboard, parasitic capacitance and probe loading will drag that number down if you aren't careful. This guide walks through the exact topology, real-world component selection, and the failure modes that destroy prototypes.
Topology Definition: Why Parallel Over Series?
When applying the LC circuit formula, you must choose between a series or parallel configuration. We focus here on the parallel LC topology (often called a tank circuit) because it is the foundational building block for RF oscillators, induction heating drivers, and band-stop (notch) filters.
In a series LC circuit, impedance drops to near zero at resonance, acting as a band-pass filter that shorts the signal to ground. In a parallel LC circuit, impedance spikes to its maximum at resonance (limited only by the inductor's internal resistance). This high-impedance peak allows the circuit to trap circulating current between the inductor and capacitor, minimizing the load on your driving source while sustaining high internal voltages.
Node Labels and Signal Flow
To analyze the circuit properly, map it to three distinct nodes:
- Node A (Drive/Source): The input terminal where the AC signal or DC bias (via a feed resistor) enters the circuit.
- Node B (L-C Junction): The shared connection point between the inductor and capacitor. This is your measurement node where the resonant voltage peak or notch appears.
- Node C (Common/Ground): The return path for both the inductor and capacitor, tied to the system ground plane.
The Behavior Matrix: Parameter Shifts and Circuit Response
Theoretical math assumes ideal components. In reality, component tolerances, temperature coefficients, and parasitic elements constantly shift your resonant frequency. The table below maps exactly how the circuit reacts when physical parameters drift.
| Variable Altered | Change Direction | Impact on \(f_r\) | Impact on Q-Factor | Physical Root Cause in Practice |
|---|---|---|---|---|
| Inductance (L) | Increases | Decreases | Increases (marginally) | Core saturation, adding turns, or bringing ferrous metal near the coil. |
| Capacitance (C) | Increases | Decreases | Unchanged | Dielectric absorption, temperature rise (X7R/Y5V ceramics), or added parasitics. |
| Inductor ESR | Increases | Unchanged | Decreases (sharply) | Skin effect at high frequencies, poor solder joints, or winding resistance heating up. |
| Parasitic Capacitance | Increases | Decreases | Unchanged | Oscilloscope probe connection, breadboard row capacitance, or PCB trace routing. |
| Drive Amplitude | Increases | Decreases (slight) | Decreases | Inductor core saturation causing effective inductance to drop at high current peaks. |
Design Walkthrough: Sizing a 100 kHz LC Tank
Let’s design a parallel tank circuit targeting exactly 100 kHz. A common beginner mistake is picking a tiny capacitor (e.g., 10 pF) and a massive inductor to satisfy the LC circuit formula. If you use a 10 pF capacitor, the 12 pF parasitic capacitance of your oscilloscope probe will more than double your total capacitance, dragging your 100 kHz resonance down to roughly 67 kHz.
To make the circuit immune to breadboard and probe parasitics, we deliberately choose a capacitance large enough to swallow stray capacitance, but small enough to keep the inductor physically reasonable.
Step 1: Select the Capacitor
We choose C = 1 nF (1000 pF). At this value, a 12 pF scope probe adds only 1.2% to the total capacitance, shifting the resonant frequency by a negligible 0.6%.
Recommended Part: Kemet C315C102K5G5TA (1 nF, 50V, C0G/NP0 dielectric). Always use C0G/NP0 dielectrics for resonant tanks. X7R or Y5V ceramics will shift capacitance drastically as the AC voltage across them increases.
Step 2: Calculate the Inductor
Rearranging the LC circuit formula to solve for L:
\( L = \frac{1}{(2\pi \cdot f_r)^2 \cdot C} \)
\( L = \frac{1}{(2\pi \cdot 100,000)^2 \cdot 1 \times 10^{-9}} = 2.533\text{ mH} \)
Recommended Part: Bourns 78F2R5K-RC (2.5 mH radial inductor, 1.2 Ω DCR). Close enough to 2.53 mH for a 99.3 kHz actual resonance.
Step 3: Verify the Q-Factor
The Quality factor (Q) determines how sharp the resonance peak is. For a parallel tank dominated by the inductor's series resistance (\(R_s\)):
\( X_L = 2\pi \cdot 100,000 \cdot 0.0025 = 1570\text{ }\Omega \)
\( Q = \frac{X_L}{R_s} = \frac{1570}{1.2} \approx 1308 \)
A Q of 1308 means this is an exceptionally sharp, high-performance tank circuit. The impedance at Node B at resonance will approach \( Q \times X_L \), or roughly 2 MΩ, creating a massive voltage spike if driven with a high-impedance source.
Extreme Failure Modes: What Breaks at the Limits?
Understanding how the circuit fails when a component goes open or shorted is critical for debugging blown function generators or silent RF stages. Here is the failure-mode contrast for the parallel topology.
Component Failure Analysis
- Shorted Inductor (L): Node B is shorted directly to Node C (Ground). The driving source sees a dead DC short. Result: Blows the output fuse of your function generator or triggers its current-limit protection. No resonance occurs.
- Open Inductor (L): The inductive path is broken. The circuit degenerates into a simple capacitor to ground. Result: Impedance drops steadily as frequency rises (\(X_C = \frac{1}{2\pi fC}\)). The resonant peak completely vanishes; you will only see a low-pass roll-off on the scope.
- Shorted Capacitor (C): Identical to a shorted inductor. Node B is shorted to Ground. Result: Source overload, blown fuses, no resonance.
- Open Capacitor (C): The capacitive path is broken. The circuit degenerates into a simple inductor to ground. Result: Impedance rises steadily with frequency (\(X_L = 2\pi fL\)). The resonant peak vanishes; you will only see a high-pass roll-off.
Step-by-Step Breadboard Verification
Simulating the LC circuit formula in SPICE is easy; proving it on a solderless breadboard requires strict probing discipline to avoid detuning the circuit with your test equipment.
- Prep the Breadboard: Insert the Bourns 2.5 mH inductor and Kemet 1 nF capacitor so that one leg of each shares a single 5-hole breadboard row (Node B). Connect the remaining legs to the ground rail (Node C).
- Configure the Source: Set your function generator to a 1 Vpp sine wave, 50 Ω output impedance. Connect the center conductor to Node B via a 10 kΩ series resistor. This resistor isolates the low-impedance function generator from the high-impedance tank, allowing the voltage peak to develop.
- Prep the Oscilloscope Probe: Set your scope probe to 10X attenuation. Critical: Remove the standard 6-inch alligator ground clip. Attach the short ground spring directly to the probe tip. The alligator clip acts as a loop antenna at 100 kHz and adds ~10 nH of stray inductance, which will cause ringing on your measurement.
- Probe Node B: Touch the probe tip to the shared L-C row (Node B) and the ground spring to the ground rail (Node C).
- Sweep and Find Resonance: Set the function generator to sweep from 50 kHz to 150 kHz. Watch the scope. You will see the voltage at Node B start low, spike dramatically as you approach 100 kHz, and drop back down as you pass it.
- Fine-Tune the Peak: Switch to manual frequency control. Adjust in 100 Hz increments around the peak. Note the exact frequency where the amplitude is highest. Compare this measured value against your theoretical 99.3 kHz calculation to determine your exact breadboard parasitic capacitance.
By anchoring your design to the physical realities of component parasitics and probing limitations, the LC circuit formula transitions from a textbook abstraction into a reliable tool for RF and power electronics design. For deeper mathematical modeling of tank circuit impedance, refer to the comprehensive breakdowns provided by All About Circuits and the filter design application notes from Electronics Tutorials.
