The Default Pick: YHDC SCT-013-000 to ESP32 Energy Monitor

If you are building a DIY home energy monitor in 2026 and need a reliable, non-invasive way to measure AC branch currents, use the YHDC SCT-013-000 (100A:50mA) split-core current transformer paired with a 33Ω burden resistor and an ESP32 DevKit V1. This specific combination steps down a 100A primary mains load to a manageable 50mA secondary current, which the 33Ω burden converts into a 1.65V RMS AC signal. When centered on a 1.65V DC bias, this perfectly utilizes the ESP32's 12-bit ADC (0-3.3V range) without clipping or requiring an external operational amplifier.

WARNING: Mains Voltage Hazard. Installing a CT inside a live breaker panel exposes you to lethal 120V/240V AC. De-energize the main breaker, apply a lockout/tagout device, and verify the bus bars are dead with a CAT III or CAT IV rated multimeter before opening the panel cover. NEC-style guidance requires working on de-energized equipment; your local AHJ may require a licensed electrician for panel modifications.

Decoding the Diagram Symbols

Before tracing the wires, you must understand the three core symbols in a standard microcontroller CT wiring diagram:

  • The CT Core (Overlapping Circles or Circle with Lines): Represents the magnetic coupling. The primary 'wire' passes through the center, while the secondary coil taps are brought out to the terminals.
  • The Burden Resistor (Zig-Zag Line): Placed across the secondary terminals. A CT must never be operated with an open secondary under load; the burden resistor safely limits the secondary voltage and converts the induced current into a measurable voltage.
  • The DC Bias / Virtual Ground (Voltage Divider Symbol): Two resistors in series from VCC to GND with a tap in the middle. Because the ESP32 ADC cannot read negative voltages (the AC signal swings below 0V), this bias shifts the entire AC waveform up by 1.65V so it oscillates between 0V and 3.3V.

Terminal Mapping and Node-by-Node Trace

The physical YHDC SCT-013-000 terminates in a 3.5mm audio jack, but internally it has two distinct secondary leads. Here is the exact terminal mapping and the continuous electrical path from the mains source to the microcontroller.

Physical Device / Node Terminal / Pin Wire Color / Trace Function in Circuit
YHDC CT Secondary Tip (S1) White (Internal) AC Signal Source (Current Out)
YHDC CT Secondary Sleeve (S2) Red (Internal) AC Signal Return (Current In)
Burden Resistor Lead 1 Jumper to S1 Current-to-Voltage Conversion
Burden Resistor Lead 2 Jumper to S2 Completes secondary loop
Bias Divider Top Resistor (10kΩ) ESP32 3V3 Pin Pulls bias node up to half-VCC
Bias Divider Bottom Resistor (10kΩ) ESP32 GND Pin Pulls bias node down to 0V
Bias Node (Midpoint) Junction To CT S2 & ESP32 GPIO34 Sets 1.65V DC offset reference
ESP32 DevKit V1 GPIO 34 (ADC1_CH6) From CT S1/Burden Reads the biased AC waveform

Node-by-Node Path Trace

  1. Mains Primary: The 120V AC Hot wire (Source) passes through the physical window of the CT and travels to the branch breaker (Load).
  2. Secondary S1 (White): The changing magnetic field induces a current that exits the CT on the White wire (S1).
  3. Burden Resistor: The current flows through the 33Ω burden resistor, dropping a proportional AC voltage (e.g., 50mA × 33Ω = 1.65V RMS at full 100A load).
  4. ADC Input: The voltage at the S1/Burden junction is routed directly to ESP32 GPIO 34.
  5. Secondary S2 (Red) & Bias Node: The current returns to the CT via the Red wire (S2). Crucially, S2 is tied to the 1.65V Bias Node, not to physical ground. This shifts the S1 voltage to swing from +1.65V to -1.65V relative to the bias, which translates to a 0V to 3.3V swing relative to the ESP32's physical GND.

Polarity and Ground Path Callout: The physical CT has an arrow stamped on the plastic casing. This arrow must point from the Source (mains feed) toward the Load (breaker). If reversed, your RMS current magnitude will still read correctly, but the phase angle will be shifted 180°, causing real power (Watts) calculations to read negative if you are also sampling voltage. The ground path for this circuit is strictly DC: the ESP32 GND pin anchors the bottom of the bias divider. Never tie the CT secondary wires to the panel's mains earth ground bus; the secondary must remain floating relative to mains earth to maintain galvanic isolation.

Step-by-Step Panel Wiring and Bias Assembly

  1. De-energize and Verify: Turn off the main service disconnect. Use a non-contact voltage tester, then verify with a multimeter across the main lugs and ground bar to confirm 0V.
  2. Build the Bias Circuit: On a breadboard or perfboard, connect two 10kΩ 1% metal film resistors in series between the ESP32's 3.3V and GND pins. Solder a 10µF ceramic or film capacitor across the midpoint and GND to filter high-frequency noise.
  3. Install the Burden: If your SCT-013-000 does not have an internal burden (the '000' variant does not; the '100V' variant does), solder a 33Ω 1/4W resistor across the Tip and Sleeve contacts of the 3.5mm breakout board.
  4. Route the CT Cable: Drill a 3/8' knockout in the side of your panel enclosure (below the wiring gutter) to route the 3.5mm jack out of the high-voltage environment. Use a strain relief connector.
  5. Clamp the CT: Open the split-core and clamp it only around the single Hot (Black or Red THHN) wire of the branch circuit you are monitoring. Never clamp around both the Hot and Neutral; their opposing magnetic fields will cancel out, yielding a 0A reading.
  6. Connect to Microcontroller: Plug the 3.5mm jack into the breakout board. Wire the Tip to GPIO 34, and the Sleeve to the 1.65V Bias Node.

Meter Verification: Proving the Circuit Before Mains Power

Before re-energizing the panel, use your multimeter to verify the low-voltage side of the diagram. This prevents bricking your ESP32 or reading garbage data.

  • Resistance Check (Burden): Set your meter to Ohms. Probe the Tip and Sleeve of the 3.5mm plug. You must read exactly 33Ω (±5%). If you read infinite (OL), your burden resistor is broken or unsoldered. Operating the CT without a burden will induce lethal high voltages on the secondary.
  • DC Voltage Check (Bias): Power the ESP32 via USB. Set your meter to DC Volts. Probe the Bias Node (Sleeve connection) and ESP32 GND. You must read 1.65V DC (acceptable range: 1.60V - 1.70V). If it reads 3.3V or 0V, your voltage divider resistors are miswired.
  • AC Voltage Check (Live Test): Once the panel is re-energized and a known load (e.g., a 1500W space heater drawing ~12.5A) is turned on, set your meter to AC millivolts. Probe across the burden resistor. You should read approximately 412mV AC (12.5A primary / 2000 ratio = 6.25mA secondary × 33Ω = 206mV RMS... wait, 100A:50mA is a 2000:1 ratio. 12.5A / 2000 = 6.25mA. 6.25mA * 33 = 206mV RMS. Adjusting expected value). You should read approximately 206mV AC. If you read 0mV, the CT is clamped over both Hot and Neutral, or the core is not fully snapped shut.

Decision Tree: Selecting Your CT and Burden

Not every circuit requires a 100A CT. Using an oversized CT for a small load results in poor ADC resolution. Use this decision matrix to select the exact part numbers for your specific monitoring target.

Target Load / Circuit Max Expected Current Recommended CT Model Required Burden Resistor Expected ADC Resolution
Lighting / Receptacles < 20A YHDC SCT-013-030 (30A:1V) None (Internal) High (Excellent for <5A loads)
Dryer / Range / Subpanel 20A - 100A YHDC SCT-013-000 (100A:50mA) 33Ω 1/4W Medium (Standard for main feeds)
Heavy Service / 200A Main 100A - 200A Magnelab RCT-1200-200 (200A:100mA) 15Ω 1/2W High (Handles 200A without core saturation)
Solar Inverter Output Bidirectional 40A Accuenergy AcuCT-SCT-040 (40A:50mA) 33Ω 1/4W High (Phase-accurate for export/import)

The Final Call: For 90% of DIY home energy monitors tracking standard 120V/240V branch circuits and main feeds under 100A, purchase the YHDC SCT-013-000 and a pack of 33Ω metal film resistors. It provides the best balance of core linearity, physical split-core ease-of-use, and direct compatibility with the ESP32's 3.3V logic limits without requiring external op-amp scaling.