The symbol of a NOT gate (commonly called an inverter) depends entirely on the regional drafting standard used in the schematic. In the US and legacy systems (ANSI/IEEE 91), the symbol of a NOT gate is a right-pointing triangle with a small circle—known as an inversion bubble—on the output. In modern international and European schematics (IEC 60617), it is represented as a rectangular block with a negation circle on the output. Both symbols perform the exact same Boolean function: outputting a logical HIGH when the input is LOW, and vice versa ($Y = \overline{A}$).
Complete NOT Gate Symbol Reference Chart
Before interpreting a schematic, identify the drafting standard. Use this table to match the symbol of a NOT gate to its governing standard and typical region.
| Standard | Symbol Shape | Input/Output Markers | Boolean Notation | Typical Usage Region |
|---|---|---|---|---|
| ANSI/IEEE 91-1984 | Right-pointing Triangle | Output bubble (inversion circle) | $Y = \overline{A}$ or $Y = A'$ | US, Canada, Japan (legacy) |
| IEC 60617 | Rectangle | Output negation circle or overbar | $Y = \overline{A}$ | EU, UK, AU, Modern Global |
| DIN 40700 | Triangle (older variant) | Output bubble, sometimes with a '1' inside | $Y = \overline{A}$ | Germany (pre-1990s legacy) |
| MIL-STD-806 | Right-pointing Triangle | Output bubble, strict line weights | $Y = \overline{A}$ | US Military / Aerospace |
Regional Standards: When to Use ANSI vs. IEC
Understanding which standard applies to your region prevents critical misinterpretations when reading datasheets or designing printed circuit boards (PCBs). While the underlying physics of the silicon remain identical, the visual language changes.
The ANSI/IEEE 91 Standard (Shape-Based)
The ANSI standard relies on distinctive shapes. Every logic gate has a unique silhouette: AND gates are D-shaped, OR gates are curved, and the symbol of a NOT gate is a triangle. This makes visual scanning of complex schematics incredibly fast for experienced engineers. If you are studying at a North American university or reading datasheets from older US-based semiconductor companies, you will predominantly see the triangle-and-bubble variant. According to All About Circuits, the distinctive shape method remains the dominant teaching tool in US electronics curricula because it allows for rapid visual pattern recognition.
The IEC 60617 Standard (Rectangle-Based)
The International Electrotechnical Commission (IEC) standard uses rectangular envelopes for almost all logic gates. The function is determined by the text or symbols inside the box, rather than the outline. For a NOT gate, the box contains the logical negation symbol (often a small circle or an overbar) on the output line. The IEC pushed for this standardization because modern programmable logic devices (FPGAs and CPLDs) contain thousands of complex gates that do not fit neatly into simple AND/OR/NOT shapes. A uniform rectangle keeps schematic software (like Altium or KiCad) organized when dealing with macro-functions.
Rows People Get Wrong and Faded IC Identification
Even with a solid grasp of the standards, bench technicians and hobbyists frequently misinterpret specific schematic elements or struggle with physical components that have lost their markings.
Mistake 1: Confusing the Inversion Bubble with a Junction Dot
The most common error when reading the symbol of a NOT gate is confusing the hollow inversion bubble with a solid junction dot.
- Hollow Circle (Bubble): Indicates logical negation (inversion). It is part of the gate symbol itself.
- Solid Filled Dot: Indicates a physical electrical connection where two wires cross and join.
Mistake 2: Misinterpreting Active-Low Inputs
Sometimes you will see an inversion bubble on the input side of a logic gate. This is not a NOT gate. When a bubble appears on an input pin of an AND or OR gate, it denotes an active-low trigger. For example, an AND gate with a bubble on input B means the gate will output HIGH only when A is HIGH and B is LOW. The bubble simply saves the drafter from drawing a separate NOT gate feeding into the AND gate.
Recovering Faded Markings on Hex Inverter ICs
At the bench, you will frequently encounter 14-pin DIP ICs where the laser etching has been burned off by heat or solvent cleaning. If you suspect the chip is a hex inverter (like the Texas Instruments SN74HC04), you can verify its identity without a logic analyzer.
- Locate Power Pins: On almost all standard 14-pin 7400-series logic ICs, Pin 7 is Ground (GND) and Pin 14 is VCC (typically 5V).
- Diode Test: Set your multimeter to diode/continuity mode. Place the red probe on Pin 1 (Input) and the black probe on Pin 7 (GND). You should read a forward voltage drop (typically 0.5V to 0.7V for bipolar TTL, or higher for CMOS protection diodes).
- Live Logic Test: Apply 5V to Pin 14 and GND to Pin 7. Using a jumper wire, pull Pin 1 (Input) HIGH. Measure Pin 2 (Output). If the IC is a NOT gate, Pin 2 will read near 0V (LOW). Pull Pin 1 LOW, and Pin 2 should read near 5V (HIGH).
Frequently Asked Questions
What does the circle mean on the symbol of a NOT gate?
The circle, universally referred to as an 'inversion bubble' or 'negation circle', represents the Boolean NOT operation. It tells the reader that the logical state of the signal is inverted at that exact point. If a HIGH (1) signal enters the gate, the bubble flips it to a LOW (0) on the output trace. In De Morgan's laws, moving a bubble from the output of an AND gate to the inputs of an OR gate maintains logical equivalence, which is why you will frequently see these bubbles used to simplify complex schematic logic.
How do I wire a physical NOT gate IC like the 74LS04?
The 74LS04 contains six independent NOT gates in a single 14-pin package. To wire it, connect Pin 14 to your 5V DC supply and Pin 7 to circuit ground. Each gate uses two pins: for Gate A, Pin 1 is the input and Pin 2 is the output; for Gate B, Pin 3 is the input and Pin 4 is the output, and so on. You must place a 0.1 µF (100 nF) ceramic decoupling capacitor as close to the IC as possible, bridging Pin 14 and Pin 7, to filter out high-frequency switching noise and prevent voltage brownouts during logic transitions.
Is there a difference between a NOT gate symbol and an inverter symbol?
In digital logic schematics, there is zero difference; the terms are completely synonymous, and both use the exact same triangle-and-bubble or IEC rectangle symbol. However, context matters heavily. If you are reading a power electronics schematic rather than a digital logic schematic, an 'inverter' refers to a DC-to-AC power conversion circuit (like a solar inverter or UPS). Power inverters use entirely different symbols, usually depicted as a rectangle with a DC input symbol and an AC sine wave output symbol, as detailed in standard electronics reference guides.
Why do some NOT gate symbols have a bubble on the input instead of the output?
A standalone NOT gate will always have its inversion bubble on the output. If you see a bubble on the input side of a triangle, you are likely looking at a buffer with an active-low enable pin, or a poorly drawn schematic where the drafter used a NOT gate symbol to represent a signal that is active-low before it enters a larger macro-block. In strict IEEE 91 drafting, a bubble on an input denotes an active-low condition for that specific pin, not a separate physical NOT gate component.
