SMPS Power Supply Block Diagram Explained: Topology Selection & Design Math

The Core SMPS Power Supply Block Diagram (And Why It Matters)

When you look at a Switched-Mode Power Supply (SMPS) schematic, it can look like a chaotic web of traces. But every isolated AC-DC SMPS follows a strict six-stage block diagram. Understanding this sequence isn't just academic; it tells you exactly where your heat, noise, and failure points will originate.

Here is the universal SMPS power supply block diagram sequence:

1. EMI Filter & Protection: Common-mode chokes and X/Y capacitors keep high-frequency switching noise off the mains. Fuses and MOVs handle catastrophic surges.
2. Rectification & Bulk Storage: A bridge rectifier converts AC to pulsating DC, which a high-voltage bulk capacitor (typically 400V rated) smooths into a raw DC bus.
3. High-Frequency Switching: A power MOSFET chops the DC bus at 65kHz to 150kHz. This is where the magic (and the heat) happens.
4. Magnetic Isolation & Step-Down: A high-frequency transformer steps the voltage down while providing galvanic isolation between the lethal primary side and the safe secondary side.
5. Output Rectification & Filtering: Secondary-side diodes (or synchronous MOSFETs) and low-ESR electrolytic capacitors smooth the chopped waveform back into clean DC.
6. Feedback & Control: An optocoupler or auxiliary transformer winding sends output voltage data back to the primary-side PWM controller to adjust the duty cycle.

Every design decision you make—component selection, thermal management, PCB layout—maps directly to one of these six blocks.

Linear vs. Switching: The Efficiency and Heat Reality

The most common question at the bench is whether to use a linear regulator or a switching topology for a specific load. The answer is dictated by thermal physics, not preference.

Let's run the headroom math for a 24V @ 5A (120W) load powered from a 48V DC battery bus. If you use a linear regulator, the dropout voltage and power dissipation are brutal:

• Power Dissipated (Linear): (48V - 24V) × 5A = 120W of pure heat.
• Efficiency (Linear): 24V / 48V = 50%.

You would need a massive heatsink and forced air cooling just to keep the silicon from melting. Now, look at the SMPS equivalent:

• Power Dissipated (SMPS at 88% efficiency): (120W / 0.88) - 120W = 16.3W of heat.
• Efficiency (SMPS): 88%.

Topology Comparison Matrix

Input Range, Protection, and Ripple Expectations

When designing the front end of your SMPS block diagram, you must define the input range and protection scheme before picking a controller IC.

Input Range: For global compatibility, design for a 'Universal Input' of 85VAC to 264VAC. This means your bulk capacitor must be rated for at least 400V (to handle the 264VAC × 1.414 peak = 373V), and your primary switching MOSFET must have a drain-source breakdown voltage (Vds) of at least 650V, preferably 700V to handle leakage inductance spikes.

Protection: You need an NTC thermistor (like a 5D-9) in series with the live line to limit inrush current when the bulk cap charges. A Metal Oxide Varistor (MOV) rated at 275VAC across line and neutral clamps grid surges. Never skip the fuse; a 2A slow-blow fuse is mandatory to prevent the PCB from catching fire if the main switching MOSFET shorts.

Ripple and Noise Expectations: Unlike linear supplies, SMPS outputs have switching noise. The peak-to-peak ripple voltage is primarily determined by the Equivalent Series Resistance (ESR) of your output capacitors, not just the capacitance value. The formula is simple: V_ripple = I_ripple × ESR. If your inductor ripple current is 2A and your capacitor ESR is 0.05 ohms, expect 100mV of peak-to-peak ripple. For noise-sensitive analog circuits, add a secondary LC pi-filter or a low-dropout linear post-regulator to clean up the final 5V or 3.3V rail.

Design Example: 120VAC to 24VDC @ 5A (120W) Flyback

Let's build a concrete 120W isolated supply for a 24V DC solar charge controller logic board. We will use the Flyback topology, which dominates the 10W to 150W range due to its low component count.

Specification Sheet & Component Selection

Thermal and Derating Notes

The INN3379C integrates the 750V PowiGaN switch, which drastically reduces switching losses compared to standard silicon MOSFETs. However, thermal management on the secondary side is critical. The output Schottky diode (MBR20100CT) will dissipate roughly 2.5W at full load (0.5V forward drop × 5A). Mount it to a small extruded aluminum heatsink or use a large copper pour on the PCB.

Capacitor Derating: Electrolytic capacitors are the first components to fail in an SMPS. A 105°C rated capacitor operating at an ambient 60°C with internal ripple heating might reach an internal core temperature of 85°C. For every 10°C reduction in operating temperature, capacitor lifespan doubles. Never place output capacitors directly next to the high-frequency transformer or the switching diode.

The Decision Path: Picking Your Topology and Controller

Stop guessing which IC to buy. Use this decision tree to terminate your design phase with a concrete part number based on your exact load requirements.

Final Recommendation for 120W Systems

If you are designing a modern 120W isolated power supply for a 24V off-grid IoT gateway or solar controller, the default recommendation is the Flyback topology using the Power Integrations INN3379C. The integrated GaN switch eliminates the need for a separate primary MOSFET and complex gate drive circuitry, shrinking the PCB footprint by roughly 30% compared to older silicon designs while maintaining 90%+ efficiency at 230VAC. Pair it with a 65kHz switching frequency to keep your EMI filtering requirements manageable, and use low-ESR polymer capacitors on the output to crush ripple below 50mV.

For deeper schematic references and application notes on the InnoSwitch3 family, consult the Power Integrations InnoSwitch3-Pro documentation. For foundational theory on isolated topologies, the Texas Instruments Isolated DC/DC portal provides excellent whitepapers on transformer winding techniques and leakage inductance management.