How to Do Binary Subtraction: Two's Complement, Logic Gates, and Firmware Math

Binary subtraction is the mathematical operation of removing one base-2 value from another, executed in digital systems either through direct bit-borrowing or by adding the two's complement of the subtrahend. If you are asking how to do binary subtraction, the direct answer is that you either borrow from the next significant bit just like in base-10, or you flip the bits of the number you are subtracting, add one, and use standard binary addition. In a real circuit or microcontroller installation, the method chosen dictates whether the Arithmetic Logic Unit (ALU) routes signals through a dedicated, slow borrow-chain or simply reuses the high-speed adder circuit with an inverted input, directly impacting silicon area, power draw, and propagation delay. Beginners commonly confuse binary subtraction with binary division, or mistakenly assume it requires a completely separate, dedicated hardware subtractor chip, when in fact almost all modern processors—from the 8-bit ATmega328P to the dual-core ESP32—perform subtraction entirely via addition.

The Core Mechanics: Direct Borrowing vs. Two's Complement

When learning how to do binary subtraction, you will encounter two distinct methods: direct borrowing and the two's complement method. Direct borrowing works exactly like the base-10 subtraction you learned in elementary school, but instead of borrowing a 10, you borrow a 2. While intuitive for humans writing on paper, direct borrowing is a nightmare for silicon designers. A hardware borrow-chain requires sequential logic gates that ripple from the least significant bit (LSB) to the most significant bit (MSB), creating propagation delay that limits clock speeds.

Enter the two's complement method. Instead of building a dedicated subtractor, digital engineers invert the bits of the subtrahend (the number being subtracted), add 1, and then feed it into a standard binary adder. According to All About Circuits, this elegantly reduces the hardware requirement, allowing a single adder circuit to handle both addition and subtraction.

Worked Numeric Example: Subtracting 45 from 92 in 8-Bit Binary

Let's look at a concrete, worked numeric example. We will subtract 45 from 92 using 8-bit unsigned integers. The target operation is 92 - 45.

• 92 in binary: 01011100
• 45 in binary: 00101101

Method 1: Direct Borrowing

Starting from the right (LSB):

1. 0 - 1: Borrow from the next column. Result is 1.
2. 0 - 0 - 1 (borrow): Borrow again. Result is 1.
3. 1 - 1 - 1 (borrow): Borrow again. Result is 1.
4. 1 - 1 - 1 (borrow): Borrow again. Result is 1.
5. 1 - 0 - 1 (borrow): Result is 0.
6. 0 - 1: Borrow. Result is 1.
7. 1 - 0 - 1 (borrow): Result is 0.
8. 0 - 0: Result is 0.

Final binary result: 00101111, which converts back to 47 in decimal.

Method 2: Two's Complement

1. Start with 45: 00101101
2. Invert all bits (One's Complement): 11010010
3. Add 1 to get Two's Complement (-45): 11010011
4. Add this to 92 (01011100):

  01011100  (92)
+ 11010011  (-45)
----------
 100101111

Because we are working with 8-bit registers, the 9th bit (the carry-out) is discarded. The remaining 8 bits are 00101111, which is exactly 47.

Where You Meet This in Practice: Microcontrollers and Logic Gates

If you are wiring up discrete logic on a breadboard or writing bare-metal firmware, binary subtraction dictates how you manage registers and IC pins. When using discrete logic ICs like the Texas Instruments SN74LS283 4-bit binary full adder (which costs roughly $0.75 in low-volume hobbyist orders), you perform subtraction by tying the C0 (carry-in) pin HIGH and feeding the B-inputs through 74LS04 hex inverters. The propagation delay for this discrete setup is around 20ns, which is perfectly adequate for educational breadboarding but too slow for modern computing.

In firmware, particularly on the ESP32, you interact with binary subtraction concepts when manipulating memory-mapped registers. For instance, clearing specific GPIO pins without affecting others relies on two's complement masking. Writing to the GPIO_OUT_W1TC_REG (Write 1 To Clear) is a hardware-level implementation of subtracting bits from a register state.

An 8-bit signed integer (int8_t) using two's complement can represent values from -128 to +127, meaning a subtraction resulting in -129 will trigger an underflow and wrap around to +127.

Common Pitfalls and Debugging Binary Math in Firmware

When writing C/C++ for microcontrollers, the compiler handles binary subtraction automatically, but edge cases will brick your logic if you aren't careful.

• Underflow Wrap-Around: If you subtract a larger uint8_t from a smaller one (e.g., 10 - 15), the result doesn't throw an error; it wraps around to 251. Always use explicit bounds checking in motor control or PID loops.
• Sign Extension Errors: When moving an 8-bit signed result into a 16-bit variable, the compiler must know the original variable was signed. If it treats it as unsigned, a negative result like 11111111 (-1) becomes 0000000011111111 (255) instead of 1111111111111111 (-1).
• The One's Complement Trap: As noted in the Wikipedia documentation on Two's Complement, older systems used one's complement, which resulted in two representations of zero (+0 and -0). Modern microcontrollers exclusively use two's complement to avoid branching logic errors when checking for zero.

#include <stdint.h>

// Safely subtract two 8-bit unsigned integers without underflow wrap-around
uint8_t safe_subtract(uint8_t minuend, uint8_t subtrahend) {
    if (subtrahend > minuend) {
        // In hardware, this triggers a borrow flag.
        // In firmware, we clamp to zero to prevent wrapping to 255.
        return 0; 
    }
    return minuend - subtrahend;
}

Frequently Asked Questions About Binary Subtraction