An LDO (Low Dropout Regulator) is a linear voltage regulator that maintains a stable output voltage even when the input voltage drops very close to the output target. Unlike legacy linear regulators like the LM317 that require 2V to 3V of headroom to function, modern LDOs operate with dropout voltages under 200mV. If you are stepping down a 3.7V Li-Ion battery to a 3.3V rail for a microcontroller, a standard linear regulator will brown out your circuit as the battery sags to 3.5V. An LDO will hold the 3.3V rail steady until the battery is nearly dead.
What Is an LDO and Why Dropout Voltage Matters
The defining specification of an LDO is its dropout voltage ($V_{DO}$). This is the minimum voltage difference required between the input ($V_{IN}$) and the output ($V_{OUT}$) for the regulator to maintain line and load regulation.
Internally, an LDO uses a pass transistor (usually a PMOS or PNP bipolar transistor) operating in its linear region. The control loop adjusts the transistor's resistance to drop the excess voltage as heat. The math for your minimum input requirement is strict:
$V_{IN(min)} = V_{OUT} + V_{DO} + V_{ripple(pk-pk)}$
If you are designing a 3.3V rail using an LDO with a 150mV dropout, and your input source has 50mV of peak-to-peak ripple, your absolute minimum input voltage must be $3.3V + 0.15V + 0.05V = 3.5V$. If your input sags to 3.4V, the LDO enters dropout, the pass transistor saturates, and the output voltage falls directly with the input, minus a small resistive drop.
Bench Tip: Always check the datasheet's dropout curve at your specific load current. A part rated for "200mV dropout" usually means 200mV at maximum rated current. At 10% load, that same LDO might only drop 20mV, giving you extra battery life in sleep modes.
LDO vs. Switching Regulators: The Topology Showdown
Choosing between an LDO (linear) and a buck converter (switching) is the most common power supply decision on the bench. Here is how the topologies compare when stepping down to a 3.3V logic rail.
| Criterion | LDO (Linear) | Buck Converter (Switching) |
|---|---|---|
| Efficiency | $V_{OUT} / V_{IN}$ (e.g., 3.3V/5V = 66%) | 85% to 95% (largely load-independent) |
| Heat Generation | High: $(V_{IN} - V_{OUT}) \times I_{LOAD}$ | Low: Dissipates only switching/conduction losses |
| Output Noise | Ultra-low (µV range, high PSRR) | High (mV range, switching frequency ripple) |
| BOM Cost & Size | Low (IC + 2 ceramic caps) | High (IC + inductor + Schottky diode + caps) |
| Transient Response | Fast (limited only by loop bandwidth) | Slower (inductor current slew-rate limited) |
The Verdict for Logic Loads: Use an LDO when your load current is under 300mA, your input-to-output differential is small (under 2V), or your load includes sensitive RF/analog circuitry that cannot tolerate switching noise. Use a switching regulator when the voltage differential is large (e.g., 12V to 3.3V) or your load current exceeds 500mA, where an LDO would require massive heatsinks.
Design Example: 5V USB to 3.3V Rail for an ESP32-S3
Let’s design a 3.3V rail for an ESP32-S3 powered via a 5V USB-C connection. The ESP32-S3 has a baseline draw of ~80mA but spikes to ~450mA during WiFi transmission bursts.
Input Range and Protection
USB 5V is nominally 5.0V but can range from 4.75V to 5.25V, with hot-plug transients ringing up to 6V. We need input protection before the LDO. A standard 500mA polyfuse followed by a SMAJ5.0A TVS diode clamps hot-plug spikes and protects against reverse-polarity faults if the USB-C CC resistors are misconfigured.
Part Selection: The TI TPS73733
For this load, we select the Texas Instruments TPS73733. It is a 1A LDO with a typical dropout of 130mV at full load. At our 450mA peak, the dropout is roughly 60mV, leaving massive headroom from our 4.75V minimum USB input.
Ripple and Noise Expectations
USB power is notoriously noisy, often carrying 50mV+ of high-frequency ripple from the host PC's switching regulators. The TPS73733 offers a Power Supply Rejection Ratio (PSRR) of 58dB at 1kHz and 45dB at 100kHz. This means a 50mV input ripple at 100kHz is attenuated by a factor of ~177, yielding less than 300µV of ripple on the 3.3V output—clean enough to prevent phase noise degradation in the ESP32's 2.4GHz RF synthesizer.
Capacitor Warning: Older LDOs (like the LM1117) require high-ESR tantalum output capacitors to maintain control loop stability. Modern LDOs like the TPS73733 are designed for low-ESR ceramics. Using a 10µF X5R ceramic capacitor on the output is mandatory here; adding a high-ESR tantalum will actually degrade the transient response to the ESP32's WiFi TX spikes.
Thermal Reality Check: Derating and Heat Dissipation
The most common way hobbyists destroy LDOs is by ignoring thermal resistance. An LDO is essentially a smart, variable resistor that burns excess voltage as heat.
Let’s calculate the worst-case power dissipation ($P_D$) for our ESP32 design:
- Max Input Voltage ($V_{IN}$): 5.25V (USB high-tolerance)
- Output Voltage ($V_{OUT}$): 3.3V
- Peak Current ($I_{LOAD}$): 0.45A
$P_D = (5.25V - 3.3V) \times 0.45A = 0.877W$
Now we look at the package. If we use the SOT-223 package, the junction-to-ambient thermal resistance ($\theta_{JA}$) is typically $50^\circ C/W$ on a standard 4-layer PCB with adequate copper pours.
$\Delta T = P_D \times \theta_{JA} = 0.877W \times 50^\circ C/W = 43.85^\circ C$
If your ambient enclosure temperature is $40^\circ C$ (common in enclosed IoT gateways), your silicon junction temperature ($T_J$) will be $40^\circ C + 43.85^\circ C = 83.85^\circ C$. The TPS73733 has a thermal shutdown threshold of $160^\circ C$. You are well within safe limits.
The Failure Mode: If you attempted this same 5V-to-3.3V conversion at 1A continuous using a tiny SOT-23-5 package ($\theta_{JA} \approx 150^\circ C/W$), the temperature rise would be $255^\circ C$. The part would hit thermal shutdown in milliseconds, oscillating on and off, causing your microcontroller to continuously brown-out and reboot.
The Decision Tree: Which Regulator Topology Wins?
Stop guessing and follow this decision path to select your topology and part.
| Condition | Topology Choice | Concrete Part Pick |
|---|---|---|
| $V_{IN} - V_{OUT} > 3V$ AND $I_{LOAD} > 300mA$ | Switching Buck | TI TPS54308 (SOT-23-6, up to 3A) |
| $V_{IN} - V_{OUT} < 2V$ AND $I_{LOAD} < 150mA$ | Ultra-Low Power LDO | Microchip MCP1700-330 (SOT-23-3, 250mA) |
| $V_{IN} - V_{OUT} < 2V$ AND $I_{LOAD} > 150mA$ (Standard Logic) | Standard High-Current LDO | Diodes Inc AP2112K-3.3 (SOT-23-5, 600mA) |
| Load includes sensitive RF/ADC AND $I_{LOAD} < 1A$ | High-PSRR / Low-Noise LDO | TI TPS73733 (SOT-223, 1A, ultra-low noise) |
The Default Concrete Pick: If you are building a general-purpose 3.3V IoT or maker project running off a USB 5V source or a single Li-Ion cell (4.2V to 3.0V) with peak currents under 600mA, standardizing your BOM on the Diodes Incorporated AP2112K-3.3 is the optimal move. It costs under $0.15 in volume, fits in a standard SOT-23-5 footprint, features a 250mV dropout at 600mA, and includes built-in foldback current limiting to protect your PCB traces during dead-shorts. For RF-heavy boards, upgrade to the TI TPS73733 in a SOT-223 package.
For deeper analysis on loop stability and capacitor ESR requirements in modern linear designs, refer to the LDO fundamentals guide on All About Circuits or the manufacturer's specific application notes on PSRR measurement techniques.






