The Direct Answer: What Is an LDO Regulator?

An LDO (Low Dropout) regulator is a type of linear voltage regulator designed to maintain a stable output voltage even when the input voltage is very close to the desired output. While a standard linear regulator like the classic LM317 requires 2V to 3V of headroom (the difference between input and output voltage) to function correctly, an LDO can regulate the output with a dropout voltage as low as 100mV to 300mV.

Internally, an LDO uses a pass element—typically a P-channel MOSFET or a PNP bipolar transistor—operating in its linear (active) region. It acts like a smart, variable resistor that continuously adjusts its resistance to drop the exact amount of excess voltage needed to keep the output steady. Because it burns off excess voltage as heat rather than storing and transferring energy like a switching regulator, an LDO is fundamentally a power-dissipating device.

The Water Analogy: Imagine a water pipe with a pressure-reducing valve. If the incoming water pressure is 60 PSI and you need 50 PSI, the valve restricts the flow to drop the 10 PSI difference, bleeding off the excess energy as turbulence (heat). An LDO does exactly this with voltage and current.

LDO vs. Switching Regulators: Topology Comparison

Deciding between linear (LDO) and switching (buck/boost) topologies is the first major fork in power supply design. You must weigh efficiency against noise and BOM (Bill of Materials) cost. Here is how they stack up across critical engineering criteria.

Criterion LDO (Linear) Buck (Switching)
Efficiency Low to Moderate. Roughly equals Vout / Vin. (e.g., 3.3V / 5V = 66%) High. Typically 85% to 95% regardless of voltage differential.
Heat Dissipation High. Pd = (Vin - Vout) × Iout. Requires thermal management at high currents. Low. Heat is primarily from MOSFET Rds(on) and inductor DCR.
Output Noise / Ripple Ultra-low. Microvolt (µV) range. Ideal for RF and precision ADCs. High. Millivolt (mV) range at switching frequencies (500kHz - 2MHz).
Cost & BOM Low ($0.10 - $0.50). Requires only the IC and two capacitors. Higher ($0.50 - $2.50+). Requires IC, inductor, diode, and multiple caps.
Transient Response Excellent. Reacts almost instantly to load steps. Slower. Limited by inductor current slew rate and control loop bandwidth.

When to choose which: Choose an LDO when your load current is under 300mA, your voltage differential is small (e.g., 5V to 3.3V), or you are powering noise-sensitive analog/RF circuits. Choose a switching regulator when stepping down high voltages (e.g., 12V to 3.3V) or when your load exceeds 300mA and thermal limits become a problem.

Design Example: Sizing an LDO for a 3.3V ESP32 Rail

Let us design a 5V-to-3.3V rail for an ESP32-S3 module using the popular Diodes Inc. AP2112K-3.3 in a SOT-23-5 package. The ESP32-S3 has a peak current draw of roughly 500mA during WiFi transmission bursts.

1. Dropout and Headroom Math

Before checking thermals, we must ensure the LDO can actually regulate. The AP2112 datasheet specifies a typical dropout voltage of 250mV at a 500mA load.

  • Input Voltage (Vin): 5.0V (USB nominal)
  • Output Voltage (Vout): 3.3V
  • Available Headroom: 5.0V - 3.3V = 1.7V

Because 1.7V of headroom is vastly greater than the 250mV dropout requirement, the regulator will easily maintain 3.3V. If our input was a 3.6V LiPo battery, the headroom would be 300mV, which is dangerously close to the 250mV dropout limit, meaning the output would sag to ~3.35V during peak WiFi bursts.

2. The Thermal Trap (Derating Note)

This is where hobbyist designs frequently fail on the bench. Power dissipation (Pd) in a linear regulator is calculated as:

Pd = (Vin - Vout) × Iout

Pd = (5.0V - 3.3V) × 0.5A = 0.85W

Thermal Shutdown Warning: The SOT-23-5 package has a typical junction-to-ambient thermal resistance (θJA) of about 160°C/W on standard FR4 PCB copper.

Temperature Rise (ΔT) = 0.85W × 160°C/W = 136°C.

At a 25°C room ambient, the silicon junction will hit 161°C. Since the AP2112's maximum junction temperature is 125°C, the part will hit thermal shutdown and reset your ESP32 during heavy WiFi loads.

The Fix: To run 500mA from a 5V source using an LDO, you must either switch to a package with an exposed thermal pad (like the DFN-6 version of the AP1117, which drops θJA to ~40°C/W with proper PCB copper pours), or abandon the LDO and use a switching buck converter like the Texas Instruments TPS562200.

3. Input Range and Protection

If your 5V input comes from an external wall adapter or a long USB cable, it is susceptible to transients and reverse polarity.

  • Reverse Polarity: Place a Schottky diode (e.g., PDS5100) on the input. Schottky is chosen over standard silicon (like 1N4007) to minimize the forward voltage drop (0.3V vs 0.7V), preserving your headroom.
  • Transients: A 5V TVS diode (e.g., SMAJ5.0A) clamps inductive spikes from cable unplugging before they breach the LDO's absolute maximum input rating (which is typically 6V to 7V for low-voltage LDOs).

Ripple, Noise, and PSRR Expectations

A common misconception is that LDOs completely eliminate input noise. While an LDO generates virtually zero internal switching noise, its ability to block noise coming from the input rail is defined by its Power Supply Rejection Ratio (PSRR). PSRR is measured in decibels (dB) and varies heavily with frequency.

For a high-performance audio or RF LDO like the TI TPS7A47:

  • At 1 kHz: PSRR might be 72 dB. This means a 100mV ripple on the input is attenuated to roughly 25 µV on the output.
  • At 1 MHz: PSRR typically drops to 25 dB or lower. A 100mV switching ripple from an upstream buck converter will pass through at roughly 5.6 mV.

This frequency-dependent degradation is why LDOs are frequently used as post-regulators. A standard design pattern is to use a highly efficient switching buck converter to step 12V down to 3.8V, followed by an ultra-low noise LDO to step 3.8V down to 3.3V. The LDO easily handles the small 0.5V differential with minimal heat, while effectively filtering out the low-frequency ripple generated by the buck converter. For authoritative data on how PSRR impacts sensitive RF loads, refer to the Texas Instruments LDO fundamentals guide.

Frequently Asked Questions

What is the difference between an LDO and a standard linear regulator?

The difference lies in the internal pass element topology. Standard linear regulators (like the LM317 or 7805) use an NPN Darlington transistor pass element, which inherently requires 1.5V to 2.5V of base-emitter voltage drop to operate. LDOs use a PNP transistor or a P-channel MOSFET as the pass element. Because a P-FET only requires a small gate-to-source voltage to enter the linear region, the saturation voltage (dropout) can be pushed down to mere millivolts, allowing the input voltage to sit just barely above the output voltage.

Can an LDO regulator step up (boost) voltage?

No. An LDO is strictly a step-down (buck) linear device. It operates by inserting a variable resistance between the input and output. It cannot generate a voltage higher than its input supply. If your input voltage drops below the target output voltage plus the required dropout margin, the LDO will simply pass the input voltage through to the output minus a small resistive drop. If you need to step up voltage, you must use a switching boost converter or a charge pump.

How do I calculate the exact dropout voltage for my specific load?

Dropout voltage is not a fixed number; it scales linearly with load current and increases with temperature. You cannot just use the single number listed on the front page of the datasheet. You must look at the 'Dropout Voltage vs. Load Current' graph in the datasheet. For example, an LDO might have a 50mV dropout at 10mA, but that same part will exhibit a 300mV dropout at 500mA. Always calculate your headroom using the dropout value specified at your maximum peak load current at the highest expected ambient temperature. For deeper mathematical modeling of pass-element resistance, consult All About Circuits' LDO breakdown.

Why does my LDO oscillate or ring on the output?

Output oscillation is almost always caused by using the wrong type of output capacitor. The control loop inside an LDO relies on the Equivalent Series Resistance (ESR) of the output capacitor for phase margin and stability. Older LDO designs (like the LM1117) explicitly require high-ESR tantalum or electrolytic capacitors (typically 0.1Ω to 1Ω) to remain stable. If you put a modern, ultra-low ESR ceramic capacitor on an LM1117, the loop will oscillate, causing massive ringing on the output rail. Conversely, modern LDOs (like the AP2112 or MCP1700) are internally compensated and require low-ESR ceramic capacitors (X5R or X7R). Always check the datasheet's 'Recommended Output Capacitor ESR' section before selecting your BOM.