An operational amplifier (op amp) is a high-gain, DC-coupled voltage amplifier with differential inputs and a single-ended output. If you are looking for the immediate answer on what to buy for general-purpose bench work: the LM358 is your safe default for single-supply DC and sensor applications, while the TL072 is the default for dual-supply AC audio work. Both cost less than $0.20 per unit in bulk and are forgiving of beginner wiring mistakes.
Understanding op amp basics requires moving past the idealized textbook triangle and looking at real-world silicon limitations like slew rate, common-mode voltage ranges, and output swing. This guide bridges the gap between theory and the workbench, giving you the exact part numbers, biasing networks, and multimeter tests you need to design and debug analog circuits.
The Anatomy of an Op Amp: Symbol, Pinout, and Internal Stages
The standard schematic symbol for an op amp is a triangle pointing to the right. The non-inverting input (+) is on top or bottom depending on regional drafting standards, the inverting input (-) is the opposite, and the output is at the point of the triangle. Power rails (V+ and V-) are often omitted in high-level schematics but are physically required for the device to function.
While op amps come in surface-mount packages like SOIC and TSSOP, the 8-pin DIP (Dual In-line Package) remains the breadboard standard. Here is the standard pinout for a dual op amp like the LM358 or TL072, referencing the Texas Instruments LM358 datasheet:
- Pin 1: Output A
- Pin 2: Inverting Input A (In-)
- Pin 3: Non-Inverting Input A (In+)
- Pin 4: V- (Ground or Negative Rail)
- Pin 5: Non-Inverting Input B (In+)
- Pin 6: Inverting Input B (In-)
- Pin 7: Output B
- Pin 8: V+ (Positive Rail)
Selecting the Right Op Amp: Safe Defaults and Spec Sheet Breakdown
Choosing an op amp means matching the silicon architecture to your power supply and signal type. Bipolar junction transistor (BJT) input op amps offer low voltage noise but require higher input bias currents. CMOS and JFET input op amps offer near-zero bias currents but can suffer from higher current noise and susceptibility to electrostatic discharge (ESD).
Below is the data-dense selection matrix for the four safest default part numbers to keep in your lab inventory for 2026.
| Part Number | Input Type | Supply Range | GBWP | Slew Rate | Input Bias Current | Avg Price (1k qty) |
|---|---|---|---|---|---|---|
| LM358 | Bipolar | 3V to 32V (Single) / ±1.5V to ±16V (Dual) | 1 MHz | 0.3 V/µs | 20 nA | $0.12 |
| TL072 | JFET | ±5V to ±18V (Dual only) | 3 MHz | 13 V/µs | 5 pA | $0.18 |
| MCP6002 | CMOS | 1.8V to 6.0V (Single/Rail-to-Rail) | 1 MHz | 0.6 V/µs | 1 pA | $0.25 |
| OPA2134 | FET | ±2.5V to ±18V (Dual) | 8 MHz | 20 V/µs | 5 pA | $4.50 |
How to select for the job: If you are reading a high-impedance photodiode or piezo sensor, use the MCP6002 or TL072; the LM358's 20nA bias current will drag the signal down. If you are interfacing with a 3.3V ESP32 ADC, use the MCP6002 because its rail-to-rail output will actually swing close to 0V and 3.3V, whereas the LM358 cannot swing its output higher than V+ minus 1.5V. For high-fidelity audio mixing, spend the extra money on the OPA2134 for its low THD (Total Harmonic Distortion) and high slew rate.
Op Amp Operation Regions and the Golden Rules
To analyze op amp circuits, we rely on two "Golden Rules" derived from ideal op amp theory:
1. Infinite Input Impedance: No current flows into the In+ or In- pins.
2. Virtual Short: When negative feedback is applied, the op amp adjusts its output to force the voltage at In- to exactly match the voltage at In+.
However, real op amps are constrained by their power rails. According to Analog Devices' op amp fundamentals, the device operates in one of three distinct regions depending on the differential input voltage and the feedback network.
| Operation Region | Condition (In+ vs In-) | Typical Output Voltage (±15V Supply) | Output Current Limit | Internal State |
|---|---|---|---|---|
| Linear (Active) | In+ ≈ In- (via feedback) | -13V to +13V (Swings within ~2V of rails) | 20mA to 40mA (Varies by part) | Both output transistors active, regulating via feedback. |
| Positive Saturation | In+ > In- (Open loop or overdriven) | +13V to +14V (Clipped at positive rail limit) | Short-circuit limited (~25mA) | Top push-pull transistor fully ON, bottom OFF. |
| Negative Saturation | In+ < In- (Open loop or overdriven) | -13V to -14V (Clipped at negative rail limit) | Short-circuit limited (~25mA) | Bottom push-pull transistor fully ON, top OFF. |
Practical Application: Designing a Single-Supply Non-Inverting Amplifier
Let's build a complete, real-world circuit. We want to amplify a 0.1V peak-to-peak AC signal from a sensor to a 1.0V peak-to-peak signal for a microcontroller ADC, using a single 5V supply. We will use the MCP6002 for its rail-to-rail capabilities.
Target Gain: 10 V/V.
Formula: Gain = 1 + (Rf / Rg)
Component Values & Biasing Network:
- Rf (Feedback Resistor): 90kΩ (Connects from Output to In-)
- Rg (Ground Resistor): 10kΩ (Connects from In- to Virtual Ground)
- R1 & R2 (Voltage Divider): Two 100kΩ resistors in series from V+ (5V) to GND. The midpoint creates a 2.5V "Virtual Ground". This biases the AC signal in the middle of the supply range so it doesn't clip on the negative half-cycle.
- C_bias: 10µF electrolytic capacitor from the 2.5V midpoint to GND to stabilize the virtual ground against AC ripple.
- C_in (Input Coupling): 1µF ceramic capacitor in series with the sensor signal to block any external DC offset before it hits the In+ pin.
- C_decouple: 100nF ceramic across V+ and GND pins.
How it works: The DC bias at the In+ pin is exactly 2.5V. Because of the virtual short rule, the In- pin is also held at 2.5V DC. The AC signal rides on top of this 2.5V DC offset. The gain of 10 amplifies the AC component, resulting in an output that swings from 2.0V to 3.0V, perfectly centered for a 3.3V or 5V ADC without clipping the negative peaks.
Bench Troubleshooting: How Op Amps Fail and Multimeter Testing
Op amps rarely fail from old age; they fail from abuse. The most common failure modes are output short circuits (wiring the output directly to a low-impedance node), latch-up (exceeding the input common-mode range, causing parasitic SCR conduction), and ESD damage to the input gate oxides in CMOS parts.
When an op amp output stage blows, one of the internal push-pull transistors shorts out, pinning the output to either V+ or V-. Here is how to test a suspected dead op amp using a standard digital multimeter (DMM).
- De-energize and Discharge: Remove power from the circuit. Short the power rails together briefly to discharge decoupling capacitors. Testing a live circuit with a DMM in resistance/diode mode will damage your meter.
- Test the Output Stage (Resistance Mode): Set your DMM to measure resistance (Ohms). Place the black probe on the V- pin (Pin 4) and the red probe on the Output pin (Pin 1 or 7). You should read a high resistance (typically >10kΩ or OL). Reverse the probes. If you read a dead short (< 5Ω) in either direction between the Output and V+ or V-, the internal output transistor is blown. Desolder and replace the IC.
- Test Input Protection Diodes (Diode Mode): Set the DMM to Diode Test mode. Place the red probe on V- (Pin 4) and touch the black probe to In+ and In-. You are forward-biasing the internal ESD protection diodes. A healthy silicon junction will read between 0.5V and 0.7V. If it reads 0.0V (short) or OL (open), the input stage is destroyed.
- Verify the Virtual Short (Live Voltage Test): If the IC passes the dead tests, reapply power. Set the DMM to DC Volts. Measure the voltage at In+ and then at In-. In a properly functioning linear circuit with negative feedback, these two voltages must be identical within 1-2 millivolts. If In+ is 2.500V and In- is 2.500V, but the output is pegged at the positive rail, your feedback resistor (Rf) is likely open or has a cold solder joint.
By keeping a bin of LM358s and MCP6002s, respecting the common-mode voltage limits, and rigorously decoupling your power pins, you will eliminate 95% of the analog noise and failure issues that plague beginner breadboard prototypes.
