The seven basic logic gates—AND, OR, NOT, NAND, NOR, XOR, and XNOR—are the physical building blocks of every digital system, from simple 555-timer latch circuits to multi-core microprocessors. While memorizing their behavior is a rite of passage for electronics students, bench work requires fast, accurate reference data. Below is the definitive lookup guide for all logic gates truth tables, paired with the real-world DC specifications and logic family characteristics you need to actually wire them into a circuit.
Master Truth Table for All Basic Logic Gates
The following table defines the Boolean output for every standard 2-input logic gate (and the 1-input NOT gate) across all possible binary input combinations. The logic symbols and function definitions conform to the IEEE Std 91-1984 (Graphic Symbols for Logic Functions) and IEC 60617-12 standards.
| Input A | Input B | AND | OR | NAND | NOR | XOR | XNOR | NOT (A) |
|---|---|---|---|---|---|---|---|---|
| 0 (LOW) | 0 (LOW) | 0 | 0 | 1 | 1 | 0 | 1 | 1 |
| 0 (LOW) | 1 (HIGH) | 0 | 1 | 1 | 0 | 1 | 0 | 1 |
| 1 (HIGH) | 0 (LOW) | 0 | 1 | 1 | 0 | 1 | 0 | 0 |
| 1 (HIGH) | 1 (HIGH) | 1 | 1 | 0 | 0 | 0 | 1 | 0 |
How to Read This Table
Read the rows as simultaneous input states applied to the gate's physical pins. A '0' represents a LOW logic level (typically 0V to 0.8V in 5V TTL, or 0V to 1.0V in 5V CMOS), and a '1' represents a HIGH logic level (typically >2.0V for TTL, >3.5V for CMOS). The NOT column ignores Input B, as it is a single-input inverter.
Quick-Jump: Most Queried Gate Behaviors
- The NAND Universal Rule: Notice that NAND is the exact inverse of AND. Because of De Morgan's Laws, you can build any other logic gate (AND, OR, NOT) using only NAND gates (e.g., the CD4011BE quad 2-input NAND). This makes it the most manufactured gate in silicon history.
- XOR for Parity and Addition: The XOR gate outputs a '1' only when inputs differ. This is the core mechanism of a half-adder circuit and is used extensively in hardware parity checkers and error-correction algorithms.
- XNOR as an Equality Checker: XNOR outputs a '1' only when both inputs match. It is the fundamental building block of digital comparators.
Logic Family Specifications: Which Column Applies to Your Circuit?
A truth table tells you what the gate does, but the logic family datasheet tells you how it behaves electrically. Selecting the wrong family is the most common cause of erratic behavior in DIY digital projects. Below is a comparison of the most common through-hole and surface-mount logic families available in 2026.
| Logic Family | Example Part | VCC Nominal | VIH (Min HIGH) | VIL (Max LOW) | Prop Delay (tpd) | Max Fan-Out |
|---|---|---|---|---|---|---|
| 74LS (TTL) | SN74LS00N | 5.0V | 2.0V | 0.8V | ~15 ns | 20 LS loads |
| 74HC (CMOS) | SN74HC00N | 2.0V - 6.0V | 3.15V (at 4.5V VCC) | 1.35V (at 4.5V VCC) | ~12 ns (at 5V) | 25 mA drive |
| 4000B (CMOS) | CD4011BE | 3.0V - 15.0V | 3.5V (at 5V VCC) | 1.5V (at 5V VCC) | ~50 ns (at 5V) | 10 mA drive |
| 74LVC (CMOS) | SN74LVC1G08 | 1.65V - 3.6V | 2.0V (at 3.0V VCC) | 0.8V (at 3.0V VCC) | ~4 ns (at 3.3V) | 50 mA drive |
Which Column Applies to Your Installation?
If you are interfacing directly with a 3.3V microcontroller like an ESP32 or Raspberry Pi Pico, the 74HC VCC column does not apply unless you run the 74HC chip at 3.3V (which severely degrades its noise margins and drive strength). For native 3.3V systems, you must look at the 74LVC or 74LV family columns. These families accept 3.3V logic levels natively and many (like the 74LVC series) feature 5V-tolerant inputs, allowing safe bidirectional level shifting.
How Temperature Derating Modifies Base Values
The propagation delay (tpd) and drive current figures in Table 2 are baseline values measured at an ambient 25°C. In industrial or high-heat environments, temperature derating significantly modifies these base values. For CMOS families (74HC, 4000B), as junction temperature approaches 85°C, carrier mobility drops, increasing propagation delay by roughly 20% to 30%. Furthermore, the maximum allowable continuous output current (I_O) must be derated by approximately 15% per 10°C rise above 25°C to prevent exceeding the IC's maximum power dissipation rating and melting the bond wires.
Never leave an unused input pin floating on a CMOS chip (74HC or 4000B). Unlike older 74LS TTL chips which internally pull floating inputs HIGH via bipolar transistor base currents, CMOS inputs have near-infinite impedance. A floating CMOS pin will act as an antenna, picking up ambient EMI, causing the internal push-pull output transistors to oscillate rapidly. This leads to massive current spikes that will overheat and destroy the IC. Always tie unused inputs to VCC or GND via a 1kΩ-10kΩ resistor.
What These Tables Cannot Tell You
Truth tables and DC specification sheets assume steady-state logic levels. They cannot predict metastability. If an input signal transitions exactly at the moment of a clock edge in a sequential logic circuit (like a flip-flop built from these gates), the output may hover in an invalid voltage state between VIL and VIH for an unpredictable duration before resolving. Truth tables also omit setup and hold times; for those dynamic constraints, you must consult the specific manufacturer's timing diagrams (available via Texas Instruments Logic Portal or NXP datasheets).
Real-World Implementation & Sourcing in 2026
When sourcing logic gates for a bench prototype or a custom PCB, packaging and availability dictate your choices. The classic 14-pin PDIP (Plastic Dual In-line Package) remains the gold standard for breadboarding, but surface-mount alternatives dominate production.
- Through-Hole Prototyping: The SN74HC00N (Quad 2-Input NAND) and SN74HC08N (Quad 2-Input AND) cost roughly $0.35 to $0.60 each from major distributors like Mouser or DigiKey. They are robust, ESD-tolerant, and easy to solder.
- Space-Constrained PCBs: For modern SMD designs, look at the "Little Logic" single-gate families, such as the SN74LVC1G08 (single AND gate in a 5-pin SOT-23 or SC-70 package). These cost under $0.10 in volume and allow you to place a single gate exactly where you need it for signal routing, eliminating the wasted board space of a quad-package where three gates sit unused.
- High-Voltage Applications: If your project involves 12V automotive or industrial control signals, the CD4000B series (e.g., CD4011BE) is your best option. It operates natively up to 15V VCC, allowing you to interface directly with 12V relays or logic levels without external level-shifters, provided you respect its slower ~50ns propagation delay.
Always verify your logic family's fan-out and voltage thresholds against the specific datasheet of the ICs you purchase. While the truth tables remain universal, the electrical physics governing how those 1s and 0s are represented in copper and silicon require strict adherence to the voltage and timing columns outlined above.
