The ESP32-S3-WROOM-1 series exposes up to 45 usable GPIOs, adds native USB OTG, and includes vector instructions for AI acceleration. However, not all pins are created equal. Four pins dictate your boot mode, two are hardwired to the USB PHY, and several are consumed internally by the PSRAM. Below is the definitive hardware map for the bare WROOM module and standard DevKit breakouts.
The Core ESP32-S3-WROOM Pinout Table
This table maps the critical pins you will interact with on the ESP32-S3-WROOM-1/1U/2 datasheet. Use this as your bench reference before routing custom PCBs or wiring breadboard prototypes.
| GPIO | Pin Name / Function | Direction | Boot / Strapping State | Practical Application & Notes |
|---|---|---|---|---|
| 0 | Strapping / JTAG | Input/Output | High = SPI Flash, Low = Download | Tie to 10k pull-up for normal boot. Pull low at reset to enter UART bootloader. |
| 3 | Strapping / JTAG | Input/Output | High = JTAG from USB, Low = JTAG from GPIO | Determines JTAG debug source. Leave floating or pull high for standard USB Serial/JTAG. |
| 19 | USB D- (Native) | Bidirectional | N/A | Native USB PHY. Routes to USB-C D- pin. Do not use for general GPIO. |
| 20 | USB D+ (Native) | Bidirectional | N/A | Native USB PHY. Routes to USB-C D+ pin. Strictly 3.3V logic levels. |
| 43 | Default UART TX | Output | N/A | Default TX for Serial0. Connect to USB-to-UART RX if bypassing native USB. |
| 44 | Default UART RX | Input | N/A | Default RX for Serial0. Connect to USB-to-UART TX for legacy serial flashing. |
| 45 | Strapping / VDD_SPI | Input | High = 3.3V, Low = 2.5V | Selects VDD_SPI voltage. Must be High (3.3V) for most standard 3.3V peripherals. |
| 46 | Strapping / Log | Input | High = ROM log, Low = Silent | Boot ROM log printing. Pull low to silence boot spam on production hardware. |
Rows People Get Wrong (and How to Avoid Bricking Your Boot)
The most common bench failures with the S3 architecture stem from misinterpreting the strapping pins and the internal memory bus. Here is where designs typically fail and how to fix them.
On the popular ESP32-S3-WROOM-1-N8R8 (8MB Flash, 8MB Octal PSRAM) variant, GPIO26 through GPIO32 are strictly reserved for the internal Octal SPI bus. They are not broken out to the external module pads. If your schematic relies on these pins for external I2C or SPI sensors, your board will fail to route. Always verify whether your specific module uses Quad SPI (which frees up a few pins) or Octal SPI before finalizing a pin map.
Strapping Pin Conflicts
Unlike the original ESP32 which only had two main strapping pins, the S3 uses four (GPIO0, 3, 45, 46). If you wire a sensor or a relay directly to GPIO45 and that sensor pulls the line low during power-on, the S3 will drop its internal SPI flash voltage to 2.5V. The silicon will brownout, the flash chip will fail to initialize, and you will be stuck in a boot loop. Rule of thumb: Never wire inductive loads, unbuffered switches, or external pull-downs to GPIO0, 3, 45, or 46 without a hardware delay circuit or an I2C GPIO expander.
Native USB vs. UART Routing
Makers frequently confuse the native USB pins (GPIO19/20) with the default UART pins (GPIO43/44). The native USB pins connect directly to the S3's internal USB PHY and support USB OTG, HID, and CDC. They do not require an external CP2102 or CH340 chip. If your custom carrier board includes a USB-to-UART bridge, you must wire the bridge's TX/RX to GPIO43 and GPIO44, not 19 and 20. Bridging the native USB lines to a 5V UART chip will instantly destroy the S3's USB PHY.
Module Variants, Wiring Standards, and Faded Markings
When moving from a breadboard to a permanent installation, or when dealing with salvaged hardware, you must account for physical module differences and external wiring standards.
WROOM-1 vs. 1U vs. 2
The pinout table above applies to the standard WROOM-1 (PCB antenna) and WROOM-1U (IPEX/U.FL connector). The ESP32-S3 Technical Reference Manual notes that the WROOM-2 variant shifts several ground pins and alters the physical footprint to accommodate different RF shielding requirements. If you are designing a drop-in replacement board, verify the exact suffix on the metal can; a WROOM-2 will not solder correctly to a WROOM-1 footprint.
IEC 60446 External Wiring Colors
When wiring external DC sensors, relays, or power supplies to your S3 breakout, abandon the random jumper-wire colors and adopt the IEC 60446 standard for DC circuits. This prevents catastrophic 12V/24V cross-wiring into the 3.3V logic pins during maintenance.
| Function | IEC 60446 DC Color | Typical S3 Connection |
|---|---|---|
| Positive Power (VCC) | Brown | 3V3 Pin (or 5V input if regulated on-board) |
| Negative / Ground | Blue | GND Pin |
| Protective Earth | Green/Yellow Stripe | Chassis ground (Never connect to S3 GND directly) |
| Signal / Data | Black or White | GPIO pins (e.g., I2C SDA/SCL, SPI MOSI) |
Safe Interpretation of Faded or Unmarked Boards
If you are working with an unmarked clone S3 development board or a salvaged WROOM module with rubbed-off silkscreen, do not guess the pinout. Apply this bench verification sequence:
- Find Ground: Set your multimeter to continuity mode. Probe the metal RF shield of the WROOM module—this is universally tied to GND. Map all GND pins on the header.
- Identify Power: Switch to DC voltage mode. Power the board via USB. Probe the pins adjacent to your known GND cluster until you read a stable 3.2V–3.4V. This is your 3V3 rail.
- Locate Native USB: With the board unpowered, use continuity mode to trace from the center pins of the USB-C receptacle directly to the header. These will be GPIO19 (D-) and GPIO20 (D+).
- Verify Logic Levels: Never apply 5V to any unverified pin. The S3 silicon is strictly 3.3V logic. If you must interface with 5V automotive or industrial sensors, use a bidirectional logic level shifter (like the TXB0108) powered from the verified 3V3 and 5V rails.
