Commercial arc fault circuit interrupters (AFCIs) use dedicated digital signal processors to detect the unique high-frequency radio noise generated by arcing faults, distinguishing them from normal appliance switching. While you cannot replace a UL-listed mains AFCI breaker with a DIY project, building an embedded prototype is the best way to understand the underlying DSP topology, current signature analysis, and high-frequency noise filtering required for arc detection.
This guide walks through the circuit configuration for an ESP32-based AFCI sensor node. We will sample the broadband RF signature of an arc (typically 10 kHz to 100 kHz) while rejecting the 50/60 Hz fundamental current, terminating in a concrete hardware design you can breadboard and test today.
The Anatomy of an Embedded Arc Fault Sensor Topology
To detect an arc, we must isolate the high-frequency noise riding on top of the 60 Hz AC mains current. The topology below uses a current transformer, an active high-pass filter, and a zero-crossing detector (ZCD) to feed the ESP32's ADC and GPIO interrupt pins.
Node Labels and Signal Path
- Node A (CT Secondary): The output of the split-core current transformer. Generates a current proportional to the primary AC load.
- Node B (Burden & Bias): A burden resistor converts the CT current to voltage. A voltage divider biases this node to 1.65V (mid-supply) so the ESP32's unipolar ADC can read the bipolar AC waveform.
- Node C (Active Filter Output): An op-amp configured as a high-pass filter strips the 60 Hz fundamental, passing only the >10 kHz arc noise.
- Node D (ESP32 ADC Input): The filtered, rectified high-frequency noise envelope feeds into GPIO 34 (ADC1_CH6).
- Node E (Zero-Crossing Detector): An optocoupler triggers a logic pulse at every 60 Hz zero-crossing, feeding GPIO 25 to synchronize the DSP sampling window.
Component Selection and Design Walkthrough
Picking the right component values is critical. If your filter cutoff is too low, the 60 Hz fundamental will saturate the ESP32's 12-bit ADC. If it is too high, you will miss the lower-frequency ignition signatures of series arcs.
1. The Current Transformer and Burden Resistor
We are using the YHDC SCT-013-000 (100A primary : 50mA secondary). To get a voltage signal, we need a burden resistor. The ESP32 ADC reads 0V to 3.3V, so our maximum peak voltage should be roughly 1.65V.
Calculation: 50mA (secondary peak) × R_burden = 1.65V. Therefore, R_burden = 33Ω. We use a standard 33Ω 1/4W resistor at Node B.
2. The Active High-Pass Filter
Arc noise is broadband, but the most reliable detection band for embedded DSP is 10 kHz to 50 kHz. We use an MCP6002 dual op-amp (rail-to-rail, 3.3V compatible) to build a 1st-order active high-pass filter.
Calculation: Cutoff frequency (fc) = 1 / (2π × R × C). Choosing a 1 nF capacitor and a 16 kΩ resistor yields fc ≈ 9.95 kHz. This effectively shorts the 60 Hz signal to ground while amplifying the arc noise.
3. Topology Decision Path
Why use a Current Transformer instead of a shunt resistor or a Hall-effect sensor? Here is the decision matrix that terminates in our final pick:
| Criteria | Shunt Resistor | Hall Effect (ACS712) | Current Transformer (SCT-013) |
|---|---|---|---|
| Galvanic Isolation | No (Lethal risk) | Yes | Yes |
| High-Freq Bandwidth | Excellent (DC-100kHz+) | Poor (Rolls off >10kHz) | Good (Up to 100kHz) |
| Insertion Loss | High (Burns power) | None | None |
| Cost & Availability | Cheapest | ~$3.00 | ~$1.50 |
| Verdict | Reject (Safety) | Reject (Bandwidth) | WINNER: SCT-013-000 |
Failure Modes: What Breaks at the Extremes?
When designing sensor front-ends, you must account for component failures. A single open or shorted passive component will either blind your arc fault circuit interrupters prototype or destroy your silicon.
| Element | Normal State | Open Fault | Short Fault |
|---|---|---|---|
| Burden Resistor (33Ω) | 1.65V max AC swing at Node B. | CATASTROPHIC: CT generates hundreds of volts. Arcs across PCB traces, destroys MCP6002 op-amp. | 0V signal at Node B. Sensor is entirely blind to arcs. |
| Coupling Cap (1 nF) | Passes >10kHz noise, blocks DC bias. | No AC signal reaches op-amp. ADC reads flatline 0V. | 1.65V DC bias shorts to op-amp input. 60Hz fundamental passes, saturates ADC. |
| Feedback Resistor (16 kΩ) | Sets filter gain and cutoff at ~10kHz. | Op-amp runs open-loop. Output rails to 3.3V or 0V. | Gain drops to zero. High-frequency noise is shunted to ground. |
Breadboard Testing and Calibration Sequence
Do not test this on live mains immediately. Use a function generator to simulate the composite waveform of a 60 Hz load with superimposed arc noise. Follow these ESP32 ADC calibration and bench-testing steps:
- Inject the Baseline: Set your function generator to output a 60 Hz sine wave at 2V peak-to-peak. Connect this to the primary side of a small bench transformer, or inject it directly into Node B (bypassing the CT) through a 10kΩ series resistor for safe bench testing.
- Verify Node B Bias: Use your multimeter in DC mode. Node B should read exactly 1.65V (half of the ESP32's 3.3V rail). If it reads 0V or 3.3V, check your voltage divider resistors (typically two 10kΩ resistors).
- Verify Node C Filtering: Connect an oscilloscope to Node C (op-amp output). With only the 60 Hz input, the output should be a flat line near 1.65V. The high-pass filter is successfully rejecting the fundamental.
- Simulate Arc Noise: Change the function generator to output a 20 kHz square wave at 100mV peak-to-peak, mixed with the 60 Hz signal. Check Node C again. You should now see the 20 kHz waveform amplified and centered around 1.65V.
- Read the ESP32: Flash the ESP32 with a simple continuous-sampling script using the
adc_oneshotdriver. Calculate the moving RMS of the ADC readings. When the 20 kHz signal is injected, the RMS value should spike, simulating an arc detection event.
Why This Topology Wins for Prototyping
When designing embedded sensors for mains diagnostics, the temptation is to use high-speed external ADCs (like the ADS1115) or dedicated analog envelope detectors. However, for a prototype arc fault circuit interrupter, the MCP6002 active filter combined with the ESP32's internal 12-bit SAR ADC is the optimal choice.
The ESP32's ADC can sample at up to 2 MS/s in theory, but practically yields clean 8-bit effective resolution at ~50 kS/s when using the I2S DMA peripheral or optimized one-shot drivers. By pushing the analog high-pass filtering to 10 kHz, we reduce the Nyquist requirement and allow the ESP32 to focus its CPU cycles on the Fast Fourier Transform (FFT) or Goertzel algorithm needed to bin the arc frequencies, rather than wasting cycles digitally filtering out the massive 60 Hz fundamental.
Final Recommendation: For your bench prototype, lock in the SCT-013-000 with a 33Ω burden, an MCP6002 active filter at 10 kHz, and an H11AA1 optocoupler for zero-crossing sync. This exact bill of materials provides the necessary bandwidth, galvanic isolation, and signal conditioning to reliably capture arc signatures without frying your microcontroller.
