The EX NOR gate (Exclusive-NOR) acts as a digital equality comparator. It outputs a logic HIGH (1) if and only if both inputs are identical—either both LOW (0,0) or both HIGH (1,1). If you are reading a schematic, the ex nor gate symbol you encounter depends entirely on the regional drafting standard used by the original engineer. Below is the immediate reference data for identifying, wiring, and troubleshooting these gates across global standards.
Global Symbol Standards: ANSI, IEC, and Legacy Variants
Schematics drafted in North America typically use the distinctive curved 'shield' shape, while European and international IEC standards rely on rectangular boxes with internal logic qualifiers. Here is the complete breakdown of how the EX NOR gate is represented across the four major drafting standards you will encounter on the bench.
| Standard | Visual Symbol Shape | Internal / Output Markings | Primary Region / Era |
|---|---|---|---|
| ANSI/IEEE 91 | Curved shield with a double-arc input edge | Inversion bubble on the output tip | North America, Modern Global |
| IEC 60617 | Strict rectangular box | '=1' inside box, inversion bubble on output | EU, UK, Australia, International |
| MIL-STD-806 | Curved shield (similar to ANSI) | Strict line weights, often uses '⊙' in text | US Military / Aerospace Legacy |
| DIN 40700 | Rectangular box with rounded corners | Ampersand/Variant internal cross-hatch | Pre-1990s European Automotive |
In practice, the ANSI symbol is essentially an XOR gate with an inversion bubble added to the output. The IEC symbol uses the '=1' qualifier—which technically denotes an XOR (output is 1 if exactly one input is high)—but adds the negation circle on the output pin to invert it to an XNOR. According to the All About Circuits digital logic guide, recognizing that negation bubble is the single most critical step in differentiating the two gates on a crowded schematic.
Truth Tables and Real-World IC Pinouts
When moving from schematic symbols to physical silicon, you will typically reach for a Quad 2-Input XNOR IC. The two most common bench staples are the CMOS CD4077 and the 74-series 74HC266. While their logic functions are identical, their output architectures are drastically different.
| Parameter | CD4077B (CMOS) | 74HC266 (CMOS) / 74LS266 (TTL) |
|---|---|---|
| Supply Voltage (VCC) | 3V to 15V | 2V to 6V (HC) / 4.75V to 5.25V (LS) |
| Output Architecture | Standard Push-Pull | Open-Drain / Open-Collector |
| Pull-Up Resistor Required? | No | Yes (typically 4.7kΩ to 10kΩ) |
| Wired-AND Capability | No | Yes (Outputs can be tied together) |
The Texas Instruments CD4077B datasheet confirms its standard push-pull outputs, meaning it can actively drive a line HIGH or LOW without external components. However, the 74HC266 series features open-drain outputs. This allows multiple XNOR gates to share a single bus line (useful in parity checking trees), but it requires external pull-up resistors to achieve a logic HIGH.
If you wire a 74HC266 exactly like a CD4077, your circuit will fail. Without a pull-up resistor to VCC, the 74HC266 can pull the output to ground (Logic 0), but it has no internal mechanism to drive the line to VCC (Logic 1). The line will simply float, resulting in erratic readings on your oscilloscope or logic probe. Always check the '266' vs '86' (XOR) datasheet notes before wiring.
The 'Rows People Get Wrong' Trap
When debugging XNOR logic on the bench, engineers and students consistently stumble over three specific failure modes related to truth table assumptions and physical IC behavior.
1. The (0,0) Output Assumption
Look at the first row of an XNOR truth table: Input A = 0, Input B = 0. The output is 1. Because standard OR and XOR gates output a 0 when both inputs are low, muscle memory leads many hobbyists to assume the XNOR does the same. The XNOR is an equality detector, not a magnitude detector. Zero equals zero, therefore the output is HIGH. If your parity checker is failing on a null data bus, verify you aren't expecting a LOW on the (0,0) row.
2. Floating CMOS Inputs
If you are using a CD4077 or 74HC266 and only utilizing two of the four internal gates, you must tie the unused inputs to either VCC or GND. Leaving CMOS inputs floating turns the gate into a high-frequency linear amplifier due to parasitic oscillation. This will cause the IC to draw massive quiescent current, overheat, and potentially brownout your microcontroller's 3.3V rail.
3. The Missing Inversion Bubble
On poorly printed or hastily drafted schematics, the tiny inversion bubble on the ANSI XNOR symbol can easily be mistaken for a speck of dust or a printing artifact, leading you to build an XOR circuit instead. Always verify the gate's function by checking the Boolean expression written nearby. An XNOR will be annotated as Y = A ⊙ B or Y = (A ⊕ B)'. If you see Y = A ⊕ B without the prime/apostrophe, it is an XOR, regardless of what the drawing looks like.
Safe Interpretation of Faded or Damaged Schematics
When working on legacy industrial equipment or repairing vintage synthesizers, you will often encounter schematics where the ink has faded, making the distinction between XOR and XNOR symbols impossible to verify visually. Furthermore, old DIN 40700 symbols are virtually unrecognizable to modern engineers.
When the symbol is illegible, deduce the gate type from its topological context within the circuit:
- Parity Generators/Checkers: If the output of the gate feeds into an LED labeled 'Parity Error' or feeds a cascading input of a magnitude comparator (like the 74LS85), it is almost certainly functioning as an XNOR. The circuit is checking for a 'match' condition.
- Phase Detectors in PLLs: In analog-mixed signal schematics (like CD4046 PLL circuits), the digital phase comparator block frequently utilizes XNOR logic to detect when two frequencies are perfectly in-phase (outputting a steady HIGH when locked).
- Probe the Silicon: If the schematic is useless, trace the PCB copper to the IC pin. Identify the chip's silkscreen part number. A quick lookup of the SN74HC266 product page or equivalent will instantly tell you if the physical silicon is an XNOR, bypassing the ambiguous schematic symbol entirely.
By cross-referencing the physical IC part number, checking for the presence of pull-up resistors (indicating open-drain XNORs), and analyzing the surrounding logic tree, you can confidently identify and troubleshoot EX NOR gates even when the original drafting standards are obscured or outdated.
