Successive approximation is an analog-to-digital conversion method that determines the digital value of an analog voltage by iteratively testing binary bits from highest to lowest using an internal DAC and comparator. If you have ever used the internal analog-to-digital converter (ADC) on an Arduino Uno (ATmega328P) or an ESP32, you have relied on a Successive Approximation Register (SAR) architecture. Rather than measuring voltage continuously like a Sigma-Delta converter or comparing against thousands of thresholds simultaneously like a Flash ADC, a SAR ADC uses a hardware binary search to lock onto the correct digital code in a predictable, fixed number of clock cycles.

The Core Mechanism: Binary Search in Hardware

Think of a SAR ADC like a hardware binary search algorithm. If I ask you to guess a number between 1 and 1024, the most efficient strategy is to start at 512. If the target is higher, you keep the 512 and add 256. If it is lower, you drop the 512 and try 256. A SAR ADC does exactly this with voltage.

Inside the silicon, a SAR ADC consists of three main blocks:

  • Sample-and-Hold (S/H) Circuit: Captures and freezes the incoming analog voltage.
  • Internal DAC (Digital-to-Analog Converter): Generates a test voltage based on the current binary guess.
  • Comparator: Compares the frozen input voltage against the DAC's test voltage and tells the SAR logic whether to keep or discard the current bit.
The Golden Rule of SAR Timing: An N-bit SAR ADC always takes exactly N clock cycles to complete a single conversion. A 12-bit ADC requires 12 cycles. This makes its conversion time highly deterministic, which is critical for real-time control loops and motor drive feedback.

Worked Numeric Example: Converting 3.20V with a 10-Bit SAR

Let's walk through a real conversion. Assume we have a 10-bit SAR ADC (1024 discrete steps) with a 5.00V reference voltage. The least significant bit (LSB) represents 5.00V / 1024 = 4.88mV. We apply a steady 3.20V to the input pin.

The SAR logic starts at the Most Significant Bit (MSB, bit 9) and works down:

StepBit TestedDAC Test VoltageComparator Result (Input vs DAC)Logic ActionCurrent Code
1Bit 9 (MSB)2.500V (Half scale)3.20V > 2.500VKeep bit (Set to 1)1000000000
2Bit 83.750V (2.5 + 1.25)3.20V < 3.750VDiscard bit (Set to 0)1000000000
3Bit 73.125V (2.5 + 0.625)3.20V > 3.125VKeep bit (Set to 1)1010000000
4Bit 63.437V (3.125 + 0.3125)3.20V < 3.437VDiscard bit (Set to 0)1010000000
5Bit 53.281V (3.125 + 0.156)3.20V < 3.281VDiscard bit (Set to 0)1010000000
6Bit 43.203V (3.125 + 0.078)3.20V < 3.203VDiscard bit (Set to 0)1010000000

The algorithm continues down to Bit 0. The final 10-bit binary output will be 1010001100 (decimal 652). If we multiply 652 by our 4.88mV LSB weight, we get 3.181V, which is the closest 10-bit representation of our 3.20V input (the 19mV difference is our quantization error).

Where You Meet SAR ADCs in Practice

SAR architectures dominate the 'middle ground' of embedded electronics—offering medium speed (100 kSPS to 5 MSPS) and medium resolution (8 to 18 bits). You will encounter them in two primary forms:

1. Internal Microcontroller ADCs

The ADC inside the ATmega328P (Arduino Uno) is a 10-bit SAR. The ESP32 features two 12-bit SAR ADCs (though they suffer from well-documented non-linearity at the voltage rails). STM32 microcontrollers typically integrate highly capable 12-bit to 16-bit SAR ADCs capable of multi-megasample rates.

2. External SPI/I2C ADC ICs

When a microcontroller's internal ADC lacks the required precision or channel count, designers add external SAR chips. The Microchip MCP3208 is a ubiquitous 12-bit, 8-channel SPI SAR ADC used heavily in Raspberry Pi and DIY sensor projects. For industrial 16-bit precision, the Texas Instruments ADS8688 is a standard choice.

What Successive Approximation Changes in Your Circuit Design

This is where most hobbyists and junior engineers make critical mistakes. Because a SAR ADC uses a switched-capacitor input stage, the input pin does not look like a static, high-impedance load.

The Charge Kickback Problem: When the SAR ADC's internal sampling switch closes, its internal capacitor (typically 10pF to 20pF) must charge to the input voltage within a few nanoseconds. If your signal source has high impedance (like a 1MΩ voltage divider), the internal cap cannot charge fully before the conversion starts. The result? Your ADC readings will be artificially low and highly erratic.

The Fix: The RC Driver Filter
You must provide a low-impedance charge reservoir right at the ADC pin. According to Analog Devices' SAR driver design guidelines, you should place a small ceramic capacitor (e.g., 1nF to 10nF C0G/NP0 dielectric) as close to the ADC pin as possible, preceded by a small series resistor (e.g., 50Ω to 100Ω).

  • The capacitor supplies the instantaneous burst of charge needed by the internal sampling switch.
  • The resistor isolates your op-amp or voltage divider from the capacitive load, preventing oscillation, and forms a low-pass filter to reject high-frequency noise above the Nyquist limit.

Common Confusions: SAR vs. Sigma-Delta vs. Flash

People frequently confuse SAR ADCs with other architectures, leading to the wrong part selection for a given application.

  • SAR vs. Sigma-Delta (ΣΔ): Sigma-Delta ADCs (like the famous ADS1115) use oversampling and digital filtering to achieve massive resolution (16 to 32 bits) but are very slow. They are ideal for DC measurements, load cells, and audio. SAR ADCs are much faster and better for capturing transient waveforms, but typically top out at 18 bits.
  • SAR vs. Flash: Flash ADCs use a massive bank of physical comparators (a 8-bit Flash needs 255 comparators) to convert in a single clock cycle. They are blindingly fast (Giga-samples per second) for oscilloscopes and SDRs, but consume massive power and silicon area. SAR uses only one comparator, trading raw speed for power efficiency and die size.

Decision Tree: Which ADC Architecture to Pick

Use this decision path to select the right ADC architecture and a concrete starting part number for your next PCB or breadboard build.

Your Primary RequirementArchitecture to ChooseConcrete Part Recommendation
High Resolution (>16-bit), DC precision, slow signals (load cells, thermocouples)Sigma-DeltaADS1115 (I2C, 16-bit) or ADS1256 (SPI, 24-bit)
Medium Resolution (12-16 bit), Medium Speed (100kSPS - 5MSPS), general sensor interfacingSuccessive Approximation (SAR)MCP3208 (SPI, 12-bit) or ADS8688 (SPI, 16-bit)
Ultra-High Speed (>10 MSPS), video/RF capture, low resolution acceptable (8-10 bit)Flash / PipelinedAD9484 (8-bit, 500MSPS) or TLC5540 (8-bit, 40MSPS)

Default Recommendation: If you are building a standard microcontroller sensor node, robotics feedback loop, or DIY data logger and your internal MCU ADC isn't cutting it, default to a 12-bit or 16-bit SAR ADC like the MCP3208 or ADS8688. They offer the best balance of speed, resolution, ease of SPI interfacing, and predictable timing without the complex digital filtering latency of Sigma-Delta chips.

FAQ: Successive Approximation Edge Cases

Why does my SAR ADC reading drop when I multiplex between channels?

When a SAR ADC switches from a high-voltage channel to a low-voltage channel, the internal sampling capacitor retains some charge from the previous reading. If your acquisition time is too short, or your external RC filter is too large (creating a long RC time constant), the capacitor won't settle to the new voltage. Increase your acquisition time or lower the external filter capacitor value.

Can I use a standard multimeter to measure the input impedance of a SAR ADC?

No. A multimeter applies a DC test voltage, but a SAR ADC's input impedance is dynamic and switched. It looks like high impedance during the conversion phase, but drops to a few kilo-ohms momentarily during the sampling phase. You must rely on the 'equivalent input RC model' provided in the component's datasheet to design your driver circuit.

Does the reference voltage affect the conversion speed?

No, the reference voltage (VREF) sets the full-scale range and the LSB size, but it does not change the clock speed or the number of cycles required. However, a noisy VREF will directly inject errors into the internal DAC's test voltages, ruining your accuracy. Always buffer and bypass your VREF pin with a 10µF and 100nF capacitor pair.