If you are asking what is impedance in the context of signal integrity, the short answer is that it is the total opposition a transmission line presents to a changing electrical signal, defined by the ratio of voltage to current ($Z_0 = V/I$). Unlike DC resistance, which you can measure with a multimeter on a dead board, characteristic impedance ($Z_0$) only exists when a signal is actively propagating. For standard single-ended high-speed digital signals, the target is 50Ω; for differential pairs (like USB or Ethernet), it is 90Ω to 100Ω.
When source, line, and load impedances do not match, signal energy reflects back toward the driver. This causes ringing, overshoot, and false triggering. Below is a decision-forward guide to identifying how uncontrolled impedance introduces noise, ranked fixes to eliminate it, and the exact methodology to prove your design works.
What Is Impedance in Signal Integrity? (The $Z_0$ Reality)
At DC, a copper trace is just a low-value resistor. But at high frequencies (or more accurately, fast edge rates), the trace acts as a transmission line. The impedance is governed by the distributed inductance ($L$) and capacitance ($C$) per unit length of the trace and its reference plane: $Z_0 = \sqrt{L/C}$.
If your driver outputs a 3.3V step into a 50Ω trace, it initially sources 66mA ($3.3V / 50\Omega$). If the receiving IC has a high-impedance input (e.g., 10kΩ), the signal hits that boundary and reflects almost entirely back to the source, doubling the voltage at the receiver momentarily (overshoot) and causing severe ringing. Controlling impedance means ensuring the physical geometry of your PCB traces (width, dielectric thickness, and copper weight) yields a consistent $Z_0$ that matches your termination strategy.
Identifying the Dominant Coupling Path
When impedance is mismatched or poorly controlled, the resulting signal degradation opens the door to noise. Noise enters your system via three distinct coupling paths. Identifying which is dominant dictates your fix.
- Capacitive (Crosstalk): High $dV/dt$ (fast edge rates) on an aggressor trace couple through parasitic mutual capacitance into a victim trace. Dominant in dense, high-speed digital routing (e.g., DDR4 memory buses) where traces run parallel for long distances.
- Conductive (Ground Bounce): Return currents from multiple signals share a high-impedance ground path. The changing current creates a voltage drop across the ground plane impedance ($V = I \times Z_{gnd}$), lifting the local ground reference. Dominant in mixed-signal boards (ADC/DAC) and poorly partitioned power supplies.
- Radiated (EMI): Uncontrolled impedance return paths force current to take long, looping detours, turning the PCB trace into an antenna. Dominant in high-frequency clock lines routed over split ground planes.
For standard high-speed digital PCBs (microcontrollers, FPGAs, memory), capacitive crosstalk is the dominant coupling path. For mixed-signal or power-converter boards, conductive ground bounce dominates due to shared return path impedance.
The Fix List: Ranked by Cost and Effectiveness
Do not reach for expensive hardware or magnetic components until you have exhausted layout and basic passive termination. Here are the fixes ranked by cost and actual effectiveness for signal integrity.
| Rank | Fix Strategy | Cost | Effectiveness | Best Application |
|---|---|---|---|---|
| 1 | Layout: 3W Rule & Solid Planes Space traces at least 3x the trace width (3W) apart. Ensure an unbroken reference plane directly beneath the signal layer. |
$0.00 | Extremely High | Eliminates capacitive crosstalk and controls $Z_0$. |
| 2 | Series Termination Resistor Place a resistor at the source to match the driver's output impedance to the trace $Z_0$. |
$0.01 | High | Stops reflections on point-to-point single-ended lines. |
| 3 | Ferrite Beads Insert a bead in series with a power rail or low-speed I/O. |
$0.05 | Low (for SI) | Not a universal cure. Useless for high-speed signal reflections. Only effective for filtering low-frequency power rail noise. |
| 4 | Shielded Cables (with proper termination) Use coaxial or shielded twisted pair for off-board connections. |
$15.00+ | High | Blocks radiated EMI for external I/O and long cable runs. |
The cheapest fix that actually works is almost always a $0.00 layout change (increasing spacing or fixing a split plane) or a $0.01 series resistor.
Decision Path: Selecting Your Termination Strategy
Use this decision tree to select the exact termination method for your transmission line. Do not guess; follow the edge rate and topology.
| Condition (If...) | Action (Then...) | Concrete Part / Value |
|---|---|---|
| Signal edge rate is > 1ns AND trace length is > 1 inch (point-to-point). | Use Source Series Termination. Add a resistor at the driver output. | Yageo RC0402FR-0733R2L (33.2Ω, 0402, 1%, 1/16W). Assumes 50Ω trace and ~17Ω CMOS driver output impedance. |
| Signal is a differential pair (USB, LVDS, Ethernet). | Route as 90Ω or 100Ω differential. Rely on the receiver's internal on-die termination (ODT). | No external resistor needed. Ensure receiver IC has ODT enabled in firmware. |
| Multiple receivers on one trace (multi-drop bus, e.g., SPI or I2C at high speed). | Use Parallel Termination (Thevenin or RC) at the furthest receiver. | 50Ω to ground, or 33pF capacitor in series with 50Ω to reduce DC power draw. |
| Clock signal > 50MHz with severe ringing on both edges. | Use AC Termination (Series RC) at the receiver. | 33Ω resistor + 100pF capacitor to ground. |
Proving the Fix: Before and After Measurement
You cannot verify characteristic impedance or reflection coefficients with a standard digital multimeter (DMM). A DMM measures DC resistance, which will read near 0Ω for a continuous trace regardless of its high-frequency $Z_0$. To prove your fix, you must use Time-Domain Reflectometry (TDR).
Step-by-Step TDR Measurement Method
- Equipment Setup: Use an oscilloscope with a built-in TDR module (e.g., Tektronix TDR100) or a dedicated VNA/TDR instrument. Connect a high-bandwidth SMA probe or solder a coaxial pigtail directly to the trace launch point.
- Calibration: Perform a short-open-load (SOL) calibration at the probe tip to remove the parasitic impedance of the probe and cables from the measurement.
- Inject the Step: The TDR injects a fast rising edge (typically < 35ps rise time) into the trace.
- Read the Profile (Before Fix): An unmatched trace will show a flat 50Ω line that suddenly spikes (open circuit at receiver) or dips (short/capacitive load). The area under the spike represents the reflected energy causing your noise.
- Apply the Fix: Solder the 33.2Ω series resistor at the source.
- Read the Profile (After Fix): The TDR waveform should now show a slight initial dip (the resistor) followed by a perfectly flat 50Ω line all the way to the receiver, with no spike at the end. The reflection is absorbed by the source impedance matching the line.
Shielding and Ground-Termination Rules
When layout and termination are not enough to stop radiated EMI, you must use shielded cables or shielded PCB enclosures. However, shielding is completely useless—and can actually act as an antenna—if the ground termination is incorrect.
- Never use "pigtail" grounds: Twisting the shield drain wire into a pigtail and soldering it to a single PCB via adds high inductance. At frequencies above 10MHz, that inductance renders the shield transparent to noise.
- Use 360-degree shield termination: The cable shield must make a continuous, unbroken metal-to-metal connection to the chassis or a dedicated ground pad on the PCB. Use shielded connectors (like SMA, BNC, or properly designed USB-C receptacles) where the shell solders directly to the ground plane with multiple vias stitching it to the internal ground layers.
- Ground at one end vs. both ends: For high-frequency signal integrity (RF, high-speed digital), ground the shield at both ends to provide a low-impedance return path for high-frequency noise currents. For low-frequency analog (audio, thermocouples) where ground loops are the primary concern, ground at one end only.
Understanding characteristic impedance and managing the return path is the foundation of clean signal design. By controlling trace geometry, applying the correct series termination, and verifying with TDR, you eliminate reflections at the source rather than trying to filter the noise after it has already corrupted your data. For further reading on high-speed design principles, refer to the Keysight Signal Integrity hub for application notes on TDR interpretation and S-parameter analysis.
