A 3-resistor voltage divider creates two distinct, stable reference voltages from a single supply rail while sharing a single quiescent current path. If you need to derive 3.3V and 1.8V reference taps from a 5V source for high-impedance loads (like comparator thresholds or a sleeping ESP32 ADC), use a series string of R1 = 3.3kΩ, R2 = 3.0kΩ, and R3 = 3.6kΩ. This specific E24 combination yields 3.33V and 1.82V while limiting quiescent draw to roughly 0.5mA.
Unlike a standard two-resistor divider, adding a third resistor introduces a second tap node, but it also couples the behavior of both outputs. If one node sags under load, the other shifts. This article breaks down the exact topology, the math behind picking real-world component values, and the hard decision tree for when to use this string versus a dedicated voltage regulator.
The Topology: Why Three Resistors Over Parallel Dividers?
The standard alternative to a 3-resistor string is building two separate 2-resistor dividers in parallel off the same 5V rail. While that isolates the taps, it doubles your quiescent current waste. The 3-resistor topology forces the same bias current through all nodes, cutting idle power draw in half.
Vin (5V) → Node A → R1 → Node B (Vout1) → R2 → Node C (Vout2) → R3 → GND
Current flows from Vin through the entire series chain to ground. The total resistance (Rt) dictates the bias current. Node B taps the voltage drop across R2 and R3 combined, while Node C taps the voltage drop across R3 alone. Because the taps are in series, any current drawn from Node B must also pass through R1, and any current drawn from Node C must pass through both R1 and R2. This makes the 3-resistor divider strictly suitable for high-impedance, low-current loads (typically <100µA per tap). If you attempt to drive an LED or a low-impedance sensor directly from these nodes, the shared resistance will cause severe voltage sag and cross-coupling between the rails.
Design Walkthrough: Sizing Real E24 Component Values
Let us design a divider for a 5.0V nominal rail to supply reference voltages to an LM393 comparator (Node B at ~3.3V) and an internal MCU ADC (Node C at ~1.8V). We will target a total string current of 0.5mA to keep the impedance low enough to minimize thermal noise, but high enough to avoid wasting battery life.
Step 1: Calculate Total Resistance
Using Ohm’s Law: Rt = Vin / Itotal = 5.0V / 0.0005A = 10,000Ω (10kΩ).
Step 2: Calculate Ideal Resistor Values
- R3 (Sets Vout2 at 1.8V): R3 = 1.8V / 0.5mA = 3,600Ω.
- R2 (Sets the 1.5V difference between 3.3V and 1.8V): R2 = (3.3V - 1.8V) / 0.5mA = 3,000Ω.
- R1 (Drops the remaining 1.7V from 5V to 3.3V): R1 = (5.0V - 3.3V) / 0.5mA = 3,400Ω.
Step 3: Map to Standard E24 Values and Verify
Resistors are manufactured in standard E24 increments. We select the closest 1% tolerance values:
| Position | Ideal Value | Selected E24 Value | Actual Voltage Drop |
|---|---|---|---|
| R1 | 3,400Ω | 3.3kΩ | 1.67V |
| R2 | 3,000Ω | 3.0kΩ | 1.52V |
| R3 | 3,600Ω | 3.6kΩ | 1.82V |
| Total | 10,000Ω | 9.9kΩ | 5.01V |
Verification: With a 9.9kΩ total string on a 5.0V rail, the actual current is 0.505mA. Node C (Vout2) sits at 1.82V. Node B (Vout1) sits at 1.82V + 1.52V = 3.34V. Both are well within the acceptable tolerance for comparator and ADC references. For a deeper look at the underlying Kirchhoff’s voltage law applications, refer to the All About Circuits DC textbook chapter on voltage dividers.
Behavior Matrix and Failure Mode Contrast
Because the nodes share a single current path, a fault or drift in one resistor cascades to the other tap. Understanding these failure modes is critical when deciding if this topology is safe for your specific circuit.
Drift Behavior Table
| Component Change | Effect on Node B (Vout1) | Effect on Node C (Vout2) | Physical Cause Example |
|---|---|---|---|
| R1 Increases | Drops | Drops | Trace corrosion or cold solder joint adding resistance. |
| R2 Increases | Rises | Drops | Thermal drift (if R2 is placed near a hot voltage regulator). |
| R3 Increases | Rises | Rises | Resistor aging or operating above 70°C ambient. |
Extreme Failure Modes: Shorts vs. Opens
When designing for reliability, you must contrast what happens when a component fails short versus when it fails open. Resistors typically fail open under over-power conditions, but PCB solder bridges can cause shorts.
- R1 Shorts: Node B and Node C are both pulled directly to 5V. Result: Catastrophic overvoltage. Any 3.3V or 1.8V IC connected to these taps will likely suffer gate oxide breakdown and be destroyed.
- R2 Opens: The string is broken. Node B floats up to 5V (pulled through R1 with no return path). Node C drops to 0V (pulled to GND through R3). Result: Asymmetric failure; the upper rail over-voltages while the lower rail dies.
- R3 Shorts: Node C is hard-grounded to 0V. Node B drops to 0V (pulled down through R2). Result: Complete loss of both reference voltages, but no overvoltage damage to downstream ICs.
Step-by-Step Breadboard Verification Protocol
Before connecting your ESP32 or op-amps to the divider taps, verify the network on the bench. Assuming you are using the 3.3k/3.0k/3.6k string designed above, follow this exact sequence.
- Power Off & Continuity Check: With the breadboard unpowered, set your multimeter to resistance mode. Probe across the entire string (from the Vin rail to the GND rail). You should read 9.9kΩ ± 1%. If you read infinite, check for unseated resistor leads.
- Verify Source Voltage: Power the board. Measure Vin to GND. It must read between 4.95V and 5.05V. If your USB rail is sagging to 4.7V, your divider outputs will scale down proportionally.
- Measure Unloaded Taps: Set the meter to DC Voltage. Probe Node C (Vout2) to GND. Expect 1.82V. Probe Node B (Vout1) to GND. Expect 3.34V.
- Apply Dummy Load Test: To simulate your actual circuit impedance, place a 100kΩ resistor between Node B and GND. Measure Node B again. Because the 100kΩ load is in parallel with the (R2+R3) 6.6kΩ leg, the equivalent resistance drops slightly. You should see Node B sag to roughly 3.15V. If it sags below 3.0V, your load impedance is too low for this divider, and you must decrease the values of R1, R2, and R3 proportionally.
- Cross-Coupling Check: While the 100kΩ load is still on Node B, measure Node C. It should remain stable at ~1.82V. If Node C shifts significantly, the current draw from Node B is altering the total string current, proving the taps are too heavily loaded for this specific resistor sizing.
Decision Tree: When to Deploy the 3-Resistor String
Do not default to a resistor divider for every voltage step-down requirement. Use this decision path to determine if the 3-resistor topology is the correct engineering choice, or if you need to pivot to an active or regulated solution.
| Condition / Constraint | Decision Path | Final Component Pick |
|---|---|---|
| Total load current across both taps exceeds 10mA. | Resistors will overheat and voltage will sag uncontrollably. Pivot to linear regulation. | Pick: TI TPS7A05 dual-output LDO or two separate AMS1117 regulators. |
| Load current is 1mA - 10mA, but requires tight 1% accuracy under varying loads. | Passive dividers lack the low output impedance required to maintain regulation under dynamic loads. | Pick: Standard 2-resistor divider feeding an op-amp voltage follower (e.g., LM358) for each rail. |
| Load current is <100µA per tap, inputs are high-impedance (ADC/Comparator), and minimizing quiescent battery drain is the priority. | Active regulators waste too much ground current. Parallel dividers waste double the bias current. | Pick: The 3-resistor series string (R1=3.3kΩ, R2=3.0kΩ, R3=3.6kΩ). |
For high-impedance sensor biasing and reference generation, the 3-resistor string is the most efficient, lowest-cost topology available. Just ensure your downstream inputs present an impedance at least 50 times greater than the Thevenin equivalent resistance of the tap you are using. For more on driving ADC inputs with high-impedance dividers, consult the SparkFun Voltage Divider Tutorial, which details the necessary RC filtering to stabilize the sampling capacitor charge.
