The strict step recovery diode definition centers on a specialized PN-junction semiconductor engineered to exhibit an exceptionally abrupt transition from forward conduction to reverse blocking. Unlike standard rectifiers that slowly sweep out minority carriers over nanoseconds, an SRD (often called a snap-off diode) stores charge during forward bias and releases it almost instantaneously when reverse-biased. This violent 'snap' generates a rich spectrum of high-frequency harmonics, making SRDs the foundational component in microwave comb generators, ultra-fast pulse sharpeners, and frequency multipliers.

If you are designing RF front-ends or picosecond timing circuits, understanding how to bias, select, and test these components is critical. Below, we break down the operating physics, provide a data-dense specification table, and walk through a complete 1 GHz comb generator design.

Step Recovery Diode Definition and Operating Regions

On a schematic, the SRD uses the standard diode symbol (a triangle pointing toward a vertical bar), though some RF texts add a small step or hook to the bar to denote the snap-off characteristic. The pinout is simple: Anode (A) and Cathode (K). In most microstrip layouts, the cathode is tied to the RF ground plane or a resonant stub, while the anode receives the forward bias and RF drive.

The magic of the SRD happens in three distinct phases. During forward bias, minority carriers are injected and stored in the junction. When the voltage reverses, the diode continues to conduct in the reverse direction (sweep-out phase) until the stored charge is nearly depleted. At the exact moment the charge hits zero, the junction impedance spikes from a few ohms to several kilo-ohms in picoseconds. This rapid $di/dt$ generates the harmonic energy.

Callout: The Water Hammer Analogy
Think of the SRD like a sudden valve closure in a high-pressure water pipe. When water flows forward (forward bias) and is suddenly reversed (reverse bias), the water flows backward briefly until the pipe empties. The instant the last drop exits and the valve slams shut (snap-off), the kinetic energy converts into a massive pressure shockwave (harmonic generation). In an SRD, that shockwave is a burst of high-frequency RF energy.
SRD Operation Regions and Junction Behavior
Operating Region Bias State Junction Behavior Typical Duration
1. Forward Storage Forward ($V_F > 0.7V$) Minority carriers inject and store in the intrinsic region. Nanoseconds to microseconds (depends on RF cycle)
2. Reverse Sweep Reverse ($V_R < 0V$) Diode conducts backward, sweeping out stored charge. Low impedance. Equal to forward storage time ($t_s$)
3. Snap-Off Transition Reverse (Depletion) Charge reaches zero. Impedance spikes violently. High $di/dt$. 10 to 100 picoseconds ($t_t$)
4. Reverse Blocking Reverse ($V_R < 0V$) Junction is fully depleted. Acts as a small parasitic capacitor. Remainder of the negative RF half-cycle

Benchmark SRD Part Numbers and RF Specifications

Selecting the right SRD requires balancing the snap time ($t_s$), breakdown voltage ($V_{BR}$), and maximum forward current ($I_F$). A faster snap time yields higher frequency harmonics, but typically at the cost of lower power handling and breakdown voltage. Below is a reference table of industry-standard SRDs used in modern RF benches.

Commercial Step Recovery Diode Specifications (Data-Dense Reference)
Part Number Manufacturer Snap Time ($t_s$) Breakdown ($V_{BR}$) Max $I_F$ Package
MMD812 Microchip (Microsemi) 50 ps 20 V 100 mA DO-213AA (MELF)
MMD830 Microchip (Microsemi) 30 ps 15 V 50 mA DO-213AA (MELF)
MA4SRD101 MACOM 70 ps 25 V 150 mA SOT-23 (SMD)
MA4SRD202 MACOM 45 ps 18 V 100 mA SOT-23 (SMD)
HP 5082-0180 Keysight (Legacy HP) 100 ps 30 V 200 mA Axial Leaded

For deeper design insights on selecting diodes for microwave applications, the Microwave Journal regularly publishes application notes detailing the trade-offs between snap time and parasitic capacitance in modern surface-mount packages.

Designing a 100 MHz to 1 GHz SRD Comb Generator

To see the step recovery diode definition in action, let us design a comb generator that takes a 100 MHz fundamental input and generates sharp pulses rich in harmonics up to and beyond 1 GHz. This circuit relies on precise biasing to ensure the diode stores exactly the right amount of charge before snapping off.

How to Bias and Select the SRD

The SRD must be forward-biased with a DC current ($I_{BIAS}$) superimposed on the RF drive. The stored charge $Q$ is roughly $Q = I_F \times t_{rr}$. If $I_{BIAS}$ is too low, the diode will not store enough charge, resulting in a weak, rounded snap with poor high-frequency harmonic content. If $I_{BIAS}$ is too high, the diode overheats, and the reverse sweep time becomes longer than the RF half-cycle, destroying the pulse edge.

Selection Rule of Thumb: Set the DC bias current so that the forward voltage drop across the bias resistor matches approximately 10% to 20% of the peak-to-peak RF drive voltage. For a +13 dBm (approx. 1V p-p) input, a bias current of 15 mA to 25 mA is ideal for the MMD812.

Complete Application Circuit: Component Values

  • U1 (SRD): Microsemi MMD812 (50 ps snap time, 20V breakdown).
  • RF Input: 100 MHz, +10 dBm to +13 dBm (0.6V to 1.0V RMS into 50 ohms).
  • C1 (DC Block): 100 pF (NP0/C0G ceramic, 0402 package). Blocks DC from the RF source.
  • L1 (RF Choke): 220 nH (Wurth Elektronik WE-KI). Provides the DC bias path while blocking 100 MHz RF from the power supply.
  • R_BIAS: 47 ohm (0402, 1% tolerance). Sets the forward bias current in conjunction with the supply voltage.
  • V_BIAS: 1.5V to 2.5V DC (Adjustable via trimpot to tune $I_F$ to ~20 mA).
  • L2 (Resonator/Peaking Inductor): 12 nH (Air-core or high-Q SMD). Resonates with the diode's parasitic capacitance at the target harmonic (e.g., 1 GHz) to peaking the output edge.
  • C2 (Output Coupling): 10 pF (NP0/C0G). Passes the high-frequency harmonics to the 50-ohm load while blocking DC.
Layout Tip for RF PCBs:
Keep the physical trace length between the SRD cathode and the peaking inductor (L2) as close to zero as possible. At 1 GHz, a 5 mm trace introduces roughly 1 nH of parasitic inductance, which will detune your resonant stub and smear the picosecond edge you are trying to generate. Use a continuous gold microstrip ground plane directly beneath the SRD.

Failure Modes, Multimeter Testing, and Safe Defaults

SRDs operate under extreme $di/dt$ and $dv/dt$ stress. Understanding how they fail and how to verify them on the bench is essential for maintaining RF test equipment.

How Step Recovery Diodes Fail

  1. Thermal Runaway (Short Circuit): The most common failure. If the forward bias current ($I_F$) exceeds the datasheet maximum (e.g., pushing 150 mA through an MMD830 rated for 50 mA), the junction overheats. The silicon intrinsic region melts, permanently shorting the anode to the cathode.
  2. Avalanche Punch-Through (Short or Open): If the reverse voltage swing exceeds the breakdown voltage ($V_{BR}$), the junction avalanches. Unlike Zener diodes, SRDs are not designed to dissipate avalanche energy. This usually results in a catastrophic short, but high-energy transients can vaporize the bond wire, causing an open circuit.
  3. Parasitic Oscillation Degradation: Not a physical failure, but a functional one. If the PCB layout introduces parasitic feedback, the SRD may snap erratically, generating phase noise instead of clean harmonics.

Testing an SRD with a Digital Multimeter

You can perform a basic health check on an SRD using a high-quality multimeter like the Fluke 87V in Diode Test mode. However, you must understand the limitations of this test.

  1. Isolate the Component: Desolder at least one leg of the SRD. Testing in-circuit will yield false readings due to parallel bias resistors and RF chokes.
  2. Forward Bias Test: Place the red probe on the Anode and the black probe on the Cathode. A healthy SRD will show a standard silicon forward voltage drop, typically between 0.500 V and 0.750 V.
  3. Reverse Bias Test: Swap the probes (black on Anode, red on Cathode). The meter should display 'OL' (Overload/Open Loop), indicating the junction is blocking current.
  4. The Multimeter Caveat: A DMM only verifies that the PN junction is intact. It cannot verify the snap time ($t_s$). An SRD can pass a DMM test perfectly but still fail in a circuit because its snap time has degraded from 50 ps to 500 ps due to lattice damage. To truly verify an SRD, you must test it in a working comb generator circuit and view the output on a sampling oscilloscope or a Time Domain Reflectometer (TDR) with a rise time of < 20 ps.

Safe Default Part Numbers for Prototyping

If you are designing a new frequency multiplier or pulse sharpener and need a reliable starting point, stick to the established manufacturers. MACOM's MA4SRD series offers excellent SMD footprints for modern automated assembly, while the Microsemi (now Microchip) MMD812 and MMD830 remain the gold standard for through-hole and MELF prototyping on FR-4 and Rogers substrates. Always pair these with a high-quality, low-ESD-capacitance RF layout to preserve the picosecond edges that define the step recovery diode's unique utility.