The most reliable simple op amp circuit for both bench prototyping and production designs is the inverting amplifier. By utilizing two resistors and an operational amplifier, you can achieve a precise, stable, and predictable negative voltage gain. The core formula governing this topology is Av = -Rf / Rin, where Rf is the feedback resistor and Rin is the input resistor. This guide provides exact component values, failure-mode analysis, and a step-by-step breadboard verification process to ensure your design works on the first power-up.

Topology Breakdown and Node Labels

The inverting amplifier relies on negative feedback to force the op amp's inputs into equilibrium. Understanding the specific node labels is critical for troubleshooting and simulation:

  • Vin (Input Node): The signal source, connected to the inverting input through Rin.
  • Vout (Output Node): The amplified, phase-inverted signal.
  • V+ (Non-Inverting Input): Tied directly to the reference ground (0V) in a dual-supply system, or to a mid-rail bias voltage in a single-supply system.
  • V- (Inverting Input / Summing Node): The junction between Rin and Rf. Because the op amp drives its output to keep V- equal to V+, this node acts as a virtual ground. It sits at 0V potential but cannot sink current to actual ground.
  • VCC / VEE (Power Rails): The positive and negative supply pins powering the IC.
Bench Tip: Never confuse the physical ground node with the virtual ground at V-. If you accidentally short V- to physical ground with a jumper wire, you bypass the feedback network, forcing the op amp into an open-loop comparator state and railing the output.

Standard E24 Resistor Pairings for Target Gains

When designing a simple op amp circuit, you rarely have the exact theoretical resistor values in your bin. You must select from the standard E24 series (5% tolerance). The table below provides optimized E24 pairings that minimize gain error while keeping resistor values in the ideal 1kΩ to 100kΩ range to avoid excessive thermal noise or op amp output loading.

Target Gain (Av) Rin (E24 Value) Rf (E24 Value) Actual Gain Gain Error
-2.0 10 kΩ 20 kΩ -2.00 0.0%
-5.0 10 kΩ 51 kΩ -5.10 +2.0%
-10.0 10 kΩ 100 kΩ -10.00 0.0%
-20.0 4.7 kΩ 91 kΩ -19.36 -3.2%
-50.0 2.0 kΩ 100 kΩ -50.00 0.0%

Design Walkthrough: Building a Gain-of-10 Stage

Let's design a DC-coupled inverting amplifier with a gain of -10 using the ubiquitous TI LM358 dual op amp. We will use a dual power supply (+/- 9V) to avoid the output swing limitations inherent to single-supply inverting configurations.

Component Selection and Bias Calculations

We select Rin = 10 kΩ and Rf = 100 kΩ. The LM358 is a bipolar-input op amp with a typical input bias current (IB) of 20 nA, and a maximum of 250 nA. To minimize DC offset voltage caused by this bias current, the Thevenin equivalent resistance seen by both inputs should match.

The resistance at the inverting input (V-) is Rin || Rf (10k || 100k ≈ 9.09 kΩ). Therefore, we should place a 9.1 kΩ resistor between the non-inverting input (V+) and ground. While many hobbyists skip this and tie V+ directly to ground, doing so with a high-gain circuit or a FET-input op amp like the TL072 will introduce measurable DC offset at the output.

Power Decoupling

Place a 100 nF (0.1 µF) ceramic capacitor as close as physically possible between VCC (Pin 8) and Ground, and another between VEE (Pin 4) and Ground. Without these, the inductance of the breadboard power rails will cause high-frequency oscillation, visible on an oscilloscope as a 10-50 MHz ripple superimposed on your clean DC output.

Inverting vs. Non-Inverting: Topology Selection

Why choose the inverting topology for a simple op amp circuit instead of the non-inverting configuration? The decision hinges on input impedance requirements and phase sensitivity. Refer to the All About Circuits semiconductor guide for deeper mathematical proofs, but the practical trade-offs are summarized below.

Criterion Inverting Amplifier Non-Inverting Amplifier
Input Impedance Low (Equal to Rin, e.g., 10 kΩ) Extremely High (Op amp common-mode impedance, >1 MΩ)
Phase Shift 180° (Output is inverted) 0° (Output is in phase)
Virtual Ground Yes (Excellent for summing/mixing signals) No (Inputs track the signal voltage)
Minimum Gain Can be less than 1 (Attenuation possible) Always ≥ 1 (Cannot attenuate)
Best Use Case Audio mixing, current-to-voltage conversion, low-impedance sources Sensor buffering, high-impedance voltage measurement, piezo pickups

Choose Inverting when: You are summing multiple audio signals, converting a photodiode's current to voltage, or driving a low-impedance source like a 50Ω function generator.
Choose Non-Inverting when: You are buffering a high-impedance sensor (like a thermocouple or pH probe) where loading the source with a 10 kΩ resistor would destroy the signal.

Behavior and Failure Mode Matrix

Understanding what breaks when a component fails is what separates a hobbyist from an engineer. The Analog Devices MT-044 tutorial details op amp open-loop behaviors, but here is the practical breadboard reality for the inverting topology.

Component Event Circuit Behavior Measured Vout Result
Rf Increases (Drift) Gain magnitude increases proportionally. Bandwidth decreases due to constant Gain-Bandwidth Product (GBWP). Higher AC amplitude; high-frequency roll-off starts earlier.
Rf Opens (Broken joint) Feedback loop breaks. Op amp enters open-loop comparator mode. Input offset voltage is amplified by 100,000+. Output hard-rails to VEE (e.g., -8.5V on a +/-9V supply).
Rf Shorts Vout is tied directly to V-. The circuit becomes a unity-gain inverter, but since V+ is at GND, V- is forced to GND. Output sits at 0V (plus a few mV of input offset). Rin acts as a simple load on Vin.
Rin Opens No signal reaches the summing node. V- is held at 0V solely by Rf connected to Vout. Output sits at 0V DC. AC signal is completely lost.
Rin Shorts Vin connects directly to V-. The op amp attempts to source/sink infinite current to keep V- at 0V. Output rails, or the Vin source is overloaded and collapses. High risk of IC thermal damage.

Breadboard Verification Procedure

Do not just wire the circuit and apply power. Follow this exact sequence to verify your simple op amp circuit without risking the IC or your test equipment.

  1. Wire Power and Ground First (Power OFF): Connect VCC and VEE to the op amp. Place the 100 nF bypass capacitors. Do not connect the signal input yet.
  2. Verify Quiescent State: Turn on the power supply. Use a multimeter to measure the voltage between the output pin (Pin 1 for LM358) and ground. It should read between -5 mV and +5 mV. If it reads several volts, your power rails are swapped, or the op amp is oscillating (switch to an oscilloscope to check).
  3. Apply DC Test Signal: Connect a bench power supply or precision voltage reference set to +0.5V DC to Vin. Measure Vout. With a gain of -10, Vout must read exactly -5.0V (±50 mV accounting for resistor tolerance and op amp offset).
  4. Check the Virtual Ground: Move your multimeter's red probe to the inverting input (Pin 2). It should read 0.000V. If it reads millivolts, your op amp is struggling with output current limits or you have a high-resistance fault in your ground wiring.
  5. Inject AC Signal: Switch the input to a function generator outputting a 1 kHz sine wave at 100 mV peak-to-peak. Probe Vout with an oscilloscope. Verify the output is 1V peak-to-peak and exactly 180° out of phase with the input trigger.
Safety & Code Caveat: This guide covers low-voltage DC and signal-level AC circuitry. If you are adapting op amp circuits to interface with mains-voltage sensors (e.g., current transformers on 120V/240V lines), you must implement galvanic isolation and adhere to NEC-style clearance and creepage distances. Always defer to a licensed electrician and your local AHJ for mains-voltage integration.