The Core Problem: Why Algebra Fails in AC Series Circuits
In a DC series circuit, Kirchhoff’s Voltage Law is simple arithmetic: the sum of the voltage drops equals the source voltage. In an AC series circuit containing reactive components, this arithmetic approach completely fails. You cannot simply add the RMS voltage drops across a resistor, inductor, and capacitor because the components shift the phase of the current and voltage relative to one another. To accurately predict circuit behavior, you must use a series vector diagram (often called a phasor diagram) to sum the voltages geometrically.
Consider a standard series RLC topology with the following node labels:
- Node A: AC Voltage Source ($V_{in}$)
- Node B: Junction between Source and Resistor ($R$)
- Node C: Junction between Resistor and Inductor ($L$)
- Node D: Junction between Inductor and Capacitor ($C$)
- Node E: Ground return to Source
Because the components are in series, the current ($I$) is identical through all elements. Therefore, we use the current vector as our horizontal reference axis (0°). The series vector diagram maps the voltage drop across each component relative to this current reference, revealing the true impedance and phase angle of the network.
Mapping the Series Vector Diagram: Node by Node
When you draw the series vector diagram, you are plotting the voltage drops as vectors originating from a common point. According to fundamental AC theory documented by resources like Georgia State University's HyperPhysics, the vectors align as follows:
- $V_R$ (Node B to C): Plotted along the horizontal axis (0°). It is perfectly in phase with the current.
- $V_L$ (Node C to D): Plotted pointing straight up (+90°). The voltage across an inductor leads the current by 90°.
- $V_C$ (Node D to E): Plotted pointing straight down (-90°). The voltage across a capacitor lags the current by 90°.
The total source voltage ($V_{in}$) is the vector sum of these three drops. Because $V_L$ and $V_C$ point in exactly opposite directions, they partially or fully cancel each other out. The magnitude of the total voltage is calculated as: $V_{total} = \sqrt{V_R^2 + (V_L - V_C)^2}$.
Behavior Table: Shifting the Vectors
Understanding how the diagram morphs when you tweak a component is critical for tuning filters. Here is what happens to the vector diagram when you change one element while holding the AC source frequency constant:
| Component Change | Vector Diagram Shift | Circuit Phase Angle ($\theta$) | Net Impedance Behavior |
|---|---|---|---|
| Increase $L$ (or raise frequency) | $V_L$ vector grows upward; $V_L > V_C$ | Shifts positive (0° to +90°) | Inductive (current lags voltage) |
| Increase $C$ (or raise frequency) | $V_C$ vector shrinks downward; $V_L > V_C$ | Shifts positive (0° to +90°) | Inductive (current lags voltage) |
| Decrease $L$ (or lower frequency) | $V_L$ vector shrinks; $V_C > V_L$ | Shifts negative (0° to -90°) | Capacitive (current leads voltage) |
| $V_L$ exactly equals $V_C$ | Vertical vectors cancel entirely; only $V_R$ remains | Exactly 0° (Unity Power Factor) | Purely Resistive (Series Resonance) |
Design Walkthrough: Building a 1 kHz Series RLC Bandpass Filter
Let’s move from theory to the workbench. We will design a series RLC bandpass filter tuned to 1 kHz, utilizing the series vector diagram to predict internal voltages and select real-world components. At series resonance, the impedance is at its absolute minimum (equal only to $R$), making it an excellent bandpass topology.
Step 1: Pick the Capacitor
We need a stable, low-ESR capacitor. Let’s choose a 100 nF (0.1 µF) polyester film capacitor, such as the Wima MKS2 series. Film capacitors handle the high internal circulating currents of resonant tanks far better than cheap ceramic discs.
Step 2: Calculate the Inductor
The resonant frequency formula is $f_r = 1 / (2\pi\sqrt{LC})$. Rearranging to solve for $L$ with $f_r = 1000$ Hz and $C = 100$ nF:
$L = 1 / ((2\pi \times 1000)^2 \times 100 \times 10^{-9}) \approx 253.3$ mH.
We will select a standard 250 mH axial inductor (e.g., Bourns 78F251K-RC). This shifts our exact resonant frequency slightly to 1006 Hz, which is perfectly acceptable for audio or general sensor filtering.
Step 3: Pick the Resistor for Target Q-Factor
The Q-factor (quality factor) dictates the bandwidth and, crucially, the internal voltage magnification. Let’s target a $Q$ of 10.
First, find the reactance at resonance: $X_L = 2\pi \times 1006 \times 0.250 \approx 1580 \Omega$.
Since $Q = X_L / R$, we need $R = 1580 / 10 = 158 \Omega$.
We will use a standard 160 $\Omega$ 1/4W metal film resistor (e.g., Yageo MFR-25).
Look closely at your series vector diagram at resonance. $V_L$ and $V_C$ are equal and opposite, canceling out so the source only "sees" $V_R$. However, the individual voltages across L and C are $Q$ times the source voltage! If you drive this circuit with a 5V RMS function generator, the vector diagram dictates that $V_L$ and $V_C$ will each be $5V \times 10 = 50V$ RMS. If you used a cheap 16V-rated ceramic capacitor, it will violently fail. Always check the vector diagram to size your component voltage ratings, not just the source voltage.
Breadboard Testing & Verification Steps
Testing AC phase relationships requires the right tools. A common trap for hobbyists is relying solely on a handheld digital multimeter (DMM) for AC circuits. As detailed in advanced AC analysis guides from Electronics Tutorials, standard DMMs measure RMS magnitude but are entirely blind to phase angle.
- Wire the Topology: Connect the function generator output to Node A. Wire the 160 $\Omega$ resistor, 250 mH inductor, and 100 nF capacitor in series, terminating at Node E (ground).
- Set the Source: Configure your function generator to output a 1006 Hz sine wave at 2.0V peak-to-peak (approx 0.7V RMS).
- Measure Magnitudes (DMM): Use a True-RMS multimeter to measure the voltage drop across the resistor ($V_R$), inductor ($V_L$), and capacitor ($V_C$). You will read roughly 0.7V across R, and 7.0V across both L and C.
- Verify the Vector Sum (Oscilloscope): If you add the DMM readings ($0.7 + 7.0 + 7.0$), you get 14.7V, which seemingly violates Kirchhoff's Law. Connect a 2-channel oscilloscope. Put Channel 1 across the source and Channel 2 across the inductor. You will visually confirm that the $V_L$ and $V_C$ sine waves are exactly 180° out of phase. The series vector diagram is proven: geometrically, they sum to zero, leaving only $V_R$ to equal the source voltage.
- Sweep the Bandwidth: Drop the frequency to 500 Hz and raise it to 2000 Hz. Observe the vector diagram shifting on the scope as the phase angle swings from capacitive to inductive, and the output amplitude across the resistor drops by -3dB.
Failure Mode Contrast: What Breaks at the Extremes?
When designing for reliability, you must contrast how a series topology fails versus its parallel counterpart. The series vector diagram makes these failure modes visually obvious.
| Failure Event | Series RLC Topology Result | Parallel RLC Topology Result |
|---|---|---|
| Capacitor Shorts | The $V_C$ vector vanishes. The circuit becomes a simple RL low-pass filter. Current increases, potentially overheating the inductor. | The tank circuit is bypassed entirely. The AC source sees a dead short, likely tripping a breaker or destroying the driving op-amp. |
| Inductor Opens | Current drops to absolute zero. All vectors on the diagram collapse to zero. The circuit is safely dead. | The tank circuit loses its resonant capability, but the parallel resistor/capacitor legs may still pass signal or DC bias, causing unpredictable downstream behavior. |
| Resistor Opens | Current stops. Circuit is safely dead. | The tank circuit continues to ring internally if excited by another path, potentially generating high circulating voltages unnoticed by the main load. |
For safety-critical or high-reliability sensor interfaces, the series topology is generally preferred because an open failure in any single component safely halts current flow, whereas parallel tanks can harbor hidden, destructive circulating currents.
Decision Matrix: When to Commit to a Series Topology
Do not default to a series RLC configuration out of habit. Use this decision path to determine if the series vector diagram aligns with your project requirements.
| Design Requirement | Choose Series RLC When... | Choose Parallel RLC When... |
|---|---|---|
| Impedance at Resonance | You need minimum impedance (to pass a specific frequency to a low-impedance load). | You need maximum impedance (to reject a specific frequency or act as a notch filter). |
| Voltage Magnification | You need to step up voltage across L or C (e.g., driving a piezo transducer or fluorescent tube). | You need to step up internal circulating current (e.g., induction heating). |
| Source Type | You are driving the circuit with a low-impedance voltage source (like a function generator or audio amp). | You are driving the circuit with a high-impedance current source or a transconductance amplifier. |
The Final Pick: If you are building an audio crossover network, an RFID antenna matching network, or a 1 kHz bandpass filter for an analog sensor front-end, commit to the Series RLC topology. Purchase the Wima MKS2 100nF capacitor, the Bourns 250mH axial inductor, and a 160-ohm metal film resistor. Wire them in series, respect the internal Q-factor voltage magnification revealed by your series vector diagram, and verify the 180° phase cancellation on an oscilloscope before integrating it into your final PCB layout.
