To measure AC mains current safely without breaking the circuit or inserting shunt resistors into the live path, use a split-core current transformer (CT) like the YHDC SCT-013-000 paired with an external burden resistor and a DC bias network. This topology provides galvanic isolation, eliminates insertion heat, and outputs a scaled AC voltage centered around a DC offset, making it directly compatible with single-supply microcontrollers like the ESP32 or Arduino.
The CT Topology: Nodes, Components, and Real Values
The standard non-invasive AC current sensing topology converts the CT's secondary current into a measurable voltage, then shifts it into the ADC's readable range. The circuit relies on four critical nodes:
- CT_SEC+ / CT_SEC-: The output terminals of the current transformer.
- V_BIAS: A synthetic mid-supply reference (e.g., 1.65V for a 3.3V system) created by a resistor divider.
- ADC_IN: The final signal node fed to the microcontroller's analog-to-digital converter.
Below is the exact bill of materials and specification table for a 100A maximum measurement system targeting a 3.3V logic ADC (like the ESP32-S3 or standard ESP32).
| Component | Part / Value | Role in Topology | Critical Rating |
|---|---|---|---|
| Current Transformer | YHDC SCT-013-000 | Steps down 100A primary to 50mA secondary | 100A:50mA ratio, 18Ω internal secondary resistance |
| Burden Resistor | 22Ω 1/4W Metal Film | Converts secondary current to AC voltage | 1% tolerance, sized for 3.3V ADC headroom |
| Bias Resistors (R1, R2) | 2x 10kΩ 1/4W | Creates 1.65V V_BIAS from 3.3V VCC | Low impedance to drive ADC sample-and-hold cap |
| Decoupling Capacitor | 10µF Electrolytic | Stabilizes V_BIAS against AC ripple | Rated ≥10V, placed parallel to R2 |
| Filter Capacitor (Optional) | 100nF Ceramic | High-frequency noise rejection at ADC_IN | Placed between ADC_IN and GND |
Design Walkthrough: Sizing the Burden Resistor
The most common mistake in DIY AC current sensing is copying a 5V Arduino tutorial and using a 33Ω burden resistor on a 3.3V ESP32. This causes the AC waveform to clip at the ADC rails, resulting in wildly inaccurate RMS calculations. Here is the exact math for a 3.3V system.
1. Determine Maximum Secondary Peak Current:
The SCT-013-000 outputs 50mA RMS at 100A primary. The peak current is:
I_peak = 0.050A × √2 = 0.0707A (70.7mA)
2. Determine Maximum Allowable Peak Voltage:
For a 3.3V ADC, the bias point is 1.65V. To avoid clipping and stay out of the ESP32's notoriously non-linear ADC zones near the rails, we limit the peak swing to 1.5V.
V_peak_max = 1.5V
3. Calculate Ideal Burden Resistance:
R_burden = V_peak_max / I_peak = 1.5V / 0.0707A = 21.2Ω
4. Select Standard Value:
The closest standard E24 resistor value is 22Ω. This yields a peak voltage of 1.55V, keeping the signal safely within the 0.1V to 3.2V linear window of the ESP32 ADC.
Behavior Matrix: What Changes When Elements Shift
| Element Changed | Direction | Effect on ADC_IN Node | System Consequence |
|---|---|---|---|
| Primary Load Current | Increases | AC voltage swing amplitude increases | Normal operation; higher ADC delta |
| Burden Resistor (R_b) | Increases (e.g., to 33Ω) | AC voltage swing exceeds 1.65V peak | Waveform clips at 3.3V rail; RMS reads low |
| Bias Resistor (R1) | Drifts high (heat/age) | V_BIAS drops below 1.65V | Asymmetric clipping; negative half-wave distorts |
| Decoupling Cap (10µF) | Fails open | V_BIAS modulates with AC signal | Phase shift and severe measurement jitter |
Why This Topology Beats the Alternatives
While Hall-effect sensors and shunt resistors are common in DC or low-voltage AC applications, the split-core CT topology is superior for mains monitoring. Here is how they compare in a 120V/240V branch circuit environment.
| Criteria | Split-Core CT (SCT-013) | Hall-Effect (ACS712) | Shunt Resistor + Op-Amp |
|---|---|---|---|
| Galvanic Isolation | Yes (Magnetic) | Yes (Internal) | No (Requires isolation amp) |
| Insertion Loss | Zero (Clamps over wire) | Zero (Inline module) | High (Dissipates heat as I²R) |
| Installation Safety | High (No bare mains exposed) | Low (Must cut wire, expose mains) | Extreme (Live mains on PCB traces) |
| DC Offset Handling | Blocks DC naturally | Measures DC + AC | Requires complex AC coupling |
When to choose the CT: Always choose the CT topology for non-invasive mains energy monitoring, smart breaker panels, and solar inverter output logging.
When to choose Hall-Effect: Only use inline Hall sensors like the ACS712 when you are building a custom PCB that must measure both DC and AC on a low-voltage (<50V) bus, and you can guarantee safe enclosure of the high-current traces.
Failure Modes: What Breaks at the Extremes?
Understanding how the circuit fails is critical for designing safe enclosures and firmware watchdogs.
- Open Secondary (Burden Resistor Removed): Catastrophic Hazard. A current transformer acts as a constant current source. If the secondary circuit is opened while primary current flows, the core saturates instantly. The induced voltage spikes to thousands of volts, arcing across the CT terminals, melting the plastic housing, and presenting a lethal shock hazard. Never use a switched jack for the burden resistor without a shorting contact.
- Shorted Secondary (Burden Resistor = 0Ω): Safe. The CT outputs zero voltage. The ADC reads a flat 1.65V DC line. No damage occurs to the CT or the microcontroller.
- Primary Open (No Load on Mains): Safe. Secondary current is zero. ADC reads flat 1.65V. Firmware should interpret a peak-to-peak delta of < 5mV as 0A to avoid noise floor jitter.
Step-by-Step Breadboard Verification Protocol
Before writing a single line of RMS calculation code or connecting the circuit to your ESP32, verify the analog front-end on the bench. This prevents bricking your microcontroller's GPIO via overvoltage.
- Build the Bias Network First: Connect the two 10kΩ resistors in series between your ESP32's 3.3V pin and GND. Connect the 10µF capacitor across the bottom resistor (GND side).
- Verify V_BIAS: Use a digital multimeter (DMM) to measure the junction of the two resistors. You must read between 1.60V and 1.70V. If it reads 0V or 3.3V, check for breadboard contact failures.
- Install the Burden Resistor: Plug the 22Ω resistor directly across the CT's 3.5mm jack terminals (or solder it to the cut cable leads). Do not leave it loose.
- Clamp and Energize: Clamp the SCT-013 around only the hot (line) wire of a known load (e.g., a 100W incandescent bulb or a space heater on low). Never clamp around the entire Romex/NM-B cable, or the magnetic fields will cancel out and read 0A.
- Measure Raw AC Output: Set your DMM to AC Voltage. Probe across the burden resistor. For a 100W load on 120V (~0.83A), the secondary current is ~0.41mA. The DMM should read roughly 9mV AC. (This confirms the CT is functioning).
- Oscilloscope Verification: Connect your scope probe to the
ADC_INnode (after the bias network). Trigger on the rising edge. You should see a clean sine wave centered exactly on 1.65V. The peak-to-peak voltage should scale linearly with the load. If the wave looks like a jagged triangle, your CT core is saturating (unlikely at low currents) or your scope probe ground is creating a ground loop. - Check Rail Headroom: Turn on your maximum expected load (e.g., a 1500W heater drawing 12.5A). Verify on the scope that the sine wave peaks do not exceed 3.1V or drop below 0.2V. If they do, increase the burden resistor value slightly or implement a software gain correction.
By rigorously sizing the burden resistor for your specific ADC voltage and verifying the bias network under load, you eliminate the analog noise and clipping issues that plague 90% of DIY energy monitoring projects. The hardware topology is only as good as its component tolerances; stick to 1% metal film resistors and verify your V_BIAS before every deployment.
