A Resistance Temperature Detector (RTD) is a precision temperature sensor constructed from pure metal wire—most commonly platinum—whose electrical resistance increases in a highly predictable, linear fashion as temperature rises. In power electronics, we use RTDs to close the thermal feedback loop, ensuring high-current devices like IGBTs and SiC MOSFETs do not silently cook themselves to death. While hobbyists often default to cheap NTC thermistors, professional thermal management demands the stability and linearity that only an RTD can provide.
What Is a Resistance Temperature Detector (and Why Pt1000 Wins)
If you are asking what is a resistance temperature detector in the context of bench design, the answer comes down to material science. The most common variant is the Pt1000, which exhibits exactly 1000 Ω of resistance at 0°C and increases by approximately 3.85 Ω per degree Celsius. According to Omega Engineering's RTD fundamentals, platinum RTDs follow the ITS-90 standard, offering long-term drift of less than 0.1°C over years of operation.
Why not use an NTC thermistor? NTCs are highly non-linear, suffer from self-heating errors at high temperatures, and require complex Steinhart-Hart math in your firmware. An RTD gives you a straight line, making it trivial to set a hard analog comparator trip-point for over-temperature shutdowns.
Thermal Path Math: Junction-to-Ambient and Derating
To use an RTD effectively, you must understand the thermal path it is monitoring. Let us run the numbers on a real device: the Wolfspeed C3M0032120K, a 1200V, 32mΩ SiC MOSFET in a TO-247-4L package.
How hot is too hot? The datasheet lists a maximum junction temperature ($T_{J(max)}$) of 175°C. However, running silicon at 175°C accelerates electromigration and gate-oxide degradation. For a reliable 10-year operational lifespan, your design target should be $T_{J} \le 135°C$ continuous.
You must also interpret the derating curve. At a case temperature ($T_C$) of 125°C, the MOSFET's $R_{DS(on)}$ increases by a factor of 1.8 compared to its 25°C baseline. If your thermal design is marginal, this resistance spike increases conduction losses, which generates more heat, creating a positive feedback loop known as thermal runaway.
We calculate the thermal resistance from junction to ambient ($R_{\theta JA}$) using the standard series equation:
T_J = T_A + P_D × (R_θJC + R_θCS + R_θSA)
- $T_J$: Target Junction Temp (135°C)
- $T_A$: Ambient Temp inside enclosure (45°C)
- $P_D$: Continuous Power Dissipation (65W)
- $R_{\theta JC}$: Junction-to-Case (0.45°C/W per datasheet)
- $R_{\theta CS}$: Case-to-Sink (Thermal interface material)
- $R_{\theta SA}$: Sink-to-Ambient (The heatsink)
Heatsink Selection and RTD Placement Strategy
Let us solve for the required heatsink thermal resistance ($R_{\theta SA}$). First, find the maximum allowable total thermal resistance:
R_θJA(max) = (135°C - 45°C) / 65W = 1.38°C/W
Next, subtract the known internal resistances. We will use a Bergquist Sil-Pad 2000S thermal pad (0.010" thick), which yields an $R_{\theta CS}$ of roughly 0.30°C/W for a TO-247 footprint.
R_θSA = 1.38 - 0.45 (JC) - 0.30 (CS) = 0.63°C/W
We need a heatsink with an $R_{\theta SA}$ of 0.63°C/W or lower. A standard extruded profile like the Wakefield-Vette 164-1311 has a natural convection rating of about 2.1°C/W—far too hot. However, as detailed in All About Circuits' thermal resistance guides, introducing forced air drastically alters the boundary layer. At 300 LFM (Linear Feet per Minute) of airflow from a 120mm chassis fan, the 164-1311 drops to approximately 0.55°C/W, safely clearing our 0.63°C/W requirement.
RTD Placement: Use a thermally conductive epoxy (like Arctic Alumina) to bond a 2x5mm SMD Pt1000 RTD directly to the machined aluminum base of the heatsink, exactly 3mm from the MOSFET mounting hole. This measures $T_C$ with minimal lag, allowing your microcontroller to accurately estimate $T_J$ by adding the calculated $P_D \times R_{\theta JC}$ offset in software.
Airflow, Enclosures, and Thermal Failure Signatures
What do airflow and enclosure changes actually buy you? Moving from natural convection (0 LFM) to modest forced air (300 LFM) drops your $R_{\theta SA}$ by nearly 75%. Conversely, restricting enclosure exhaust vents can easily raise your local $T_A$ from 25°C to 50°C, instantly consuming your thermal margin.
If your RTD reads a stable 80°C but the power stage eventually fails, you are likely witnessing specific thermal stress failure signatures:
| Failure Signature | Physical Cause | Diagnostic Clue |
|---|---|---|
| Gate Threshold Shift ($V_{th}$) | Gate oxide degradation from sustained >150°C junction temps. | Device requires higher gate drive voltage to turn on; increased switching losses. |
| Solder Voiding / Die Attach Fatigue | CTE (Coefficient of Thermal Expansion) mismatch causing micro-cracks under the silicon die. | RTD case temp drops, but junction temp spikes. Thermal impedance ($Z_{th}$) increases. |
| Bond Wire Lift-off | Thermal cycling (swinging from 40°C to 120°C repeatedly) shears aluminum source wires. | Sudden, catastrophic open-circuit failure or massive $R_{DS(on)}$ increase. |
Decision Path: Sizing Your RTD and Thermal Loop
Do not guess your sensor and cooling strategy. Use this decision matrix to terminate your design process with a concrete bill of materials.
| Application Condition | If True, Select This Sensor | Interface / Heatsink Action |
|---|---|---|
| $P_D < 15W$, Natural Convection | 10kΩ NTC Thermistor (e.g., EPCOS B57891S) | Read via voltage divider; use stamped Wakefield-Vette 680-series clip-on sink. |
| $P_D$ 15W - 50W, Enclosed Chassis | Pt100 RTD (Wire-wound probe) | Requires MAX31865 SPI amp; use extruded sink with thermal pad. |
| $P_D > 50W$, High Reliability / SiC | Pt1000 Class A SMD (2x5mm) | Epoxy to sink base; 1mA excitation direct to MCU ADC; mandate forced air >200 LFM. |
Default Recommendation: For any modern power stage dissipating over 50W (such as solar inverters, EV chargers, or motor drives), standardize on the Pt1000 Class A SMD sensor. Pair it with an extruded aluminum heatsink profile sized via the $R_{\theta JA}$ math above, and enforce a 300 LFM minimum airflow rule in your enclosure CAD. This eliminates non-linear firmware math, prevents thermal runaway from derating curves, and provides the precise data needed to predict end-of-life die attach fatigue.
