An RLC circuit is a resonant electrical network combining a resistor (R), inductor (L), and capacitor (C) to filter, tune, or dampen AC signals. The most common configuration is the series RLC, used for bandpass filtering and impedance matching, where resonance occurs when inductive reactance equals capacitive reactance ($X_L = X_C$). If you need to pass a specific frequency while rejecting others, a series RLC is your default topology. If you need to reject a specific frequency (band-stop) or stabilize a power supply, you use a parallel RLC.

In this guide, we will move past abstract theory and design a physical 15.9 kHz series bandpass filter, accounting for real-world parasitics like inductor DC resistance (DCR) and function generator output impedance.

The Core Topology: Series vs. Parallel RLC Networks

Before picking components, you must choose your topology. The physical arrangement of the nodes dictates whether the circuit passes or rejects the resonant frequency.

Series RLC Topology (Bandpass Default)

In a series configuration, components are daisy-chained. Current flows through all three sequentially.

  • Node A (Input): AC signal source enters.
  • Node B: Junction between the Resistor and Inductor.
  • Node C: Junction between the Inductor and Capacitor.
  • Node D (Ground): Capacitor connects to ground, completing the loop.

Output tap: To create a bandpass filter, you measure the voltage across the resistor (Node B to Node D). At resonance, the L and C impedances cancel out, leaving only R to drop voltage. Maximum current flows, yielding maximum output voltage.

Parallel RLC Topology (Band-Stop / Tank Default)

In a parallel configuration, the L and C are placed in parallel with each other, and that pair is placed in series with the signal path (often with a source resistor).

  • Node A (Input): AC signal enters through a source resistor.
  • Node B (Output): Junction where the Inductor and Capacitor both connect to the signal path.
  • Node C (Ground): The other ends of the L and C tie to ground.

Output tap: Measured at Node B. At resonance, the parallel LC tank exhibits maximum impedance (ideally infinite), blocking the resonant frequency from reaching the output. This makes it a natural band-stop (notch) filter.

Why pick series over parallel? Choose series when you need to extract a specific frequency from a noisy signal (like an AM radio tuner or a sensor excitation frequency). Choose parallel when you need to eliminate a specific interference frequency (like filtering out 60 Hz mains hum) or when building an LC oscillator tank circuit.

Behavior Matrix: How Component Changes Shift the Response

When tuning an RLC circuit on the bench, you need to know which component to swap to fix a specific response issue. Here is the behavior matrix for a series RLC circuit:

Parameter Changed Effect on Resonant Freq ($f_r$) Effect on Q-Factor Effect on Bandwidth (BW)
Increase R No change Decreases (more damping) Widens
Decrease R No change Increases (sharper peak) Narrows
Increase L Decreases Increases Narrows
Decrease L Increases Decreases Widens
Increase C Decreases Decreases Widens
Decrease C Increases Increases Narrows

Failure Modes at the Extremes: Opens and Shorts

Understanding how topologies fail is critical for debugging and safety. A shorted capacitor behaves very differently in series versus parallel.

Failure Mode Series RLC Result Parallel RLC Result
Resistor Opens Circuit dead. Zero current, zero output. If R is the feed resistor, circuit dead. If R is a parallel damping resistor, Q spikes to infinity (limited by parasitics).
Inductor Opens Circuit dead. Zero current. Tank becomes purely capacitive. Resonance is lost; acts as a simple low-pass RC filter.
Capacitor Shorts Inductor and Resistor remain. Circuit becomes a low-pass RL filter. High current may flow at high frequencies. Shorts the entire tank to ground. Output drops to zero. Source may overcurrent or blow a fuse.
Inductor Shorts Capacitor and Resistor remain. Circuit becomes a high-pass RC filter. DC is still blocked. Shorts the tank to ground. Output drops to zero. Source may overcurrent.

Design Walkthrough: Building a 15.9 kHz Series Bandpass Filter

Let's design a series RLC bandpass filter targeting a resonant frequency ($f_r$) of roughly 15.9 kHz with a Q-factor of 5. We will use real, purchasable components and account for hidden parasitics.

Step 1: Select L and C for Resonance

The resonant frequency formula is $f_r = \frac{1}{2\pi\sqrt{LC}}$. We want standard, easily sourced values. Let's pick a 10 nF capacitor and a 10 mH inductor.

  • C: 10 nF (Vishay K103K15X7RF5UH5, 50V, X7R ceramic)
  • L: 10 mH (Bourns 78FR10K-RC, radial shielded)

Plugging these in: $f_r = \frac{1}{2\pi\sqrt{10\times 10^{-3} \times 10\times 10^{-9}}} = 15,915 \text{ Hz}$.

Step 2: Calculate Total Resistance for Q = 5

The Q-factor for a series RLC is $Q = \frac{1}{R_{total}} \sqrt{\frac{L}{C}}$.
Rearranging for $R_{total}$: $R_{total} = \frac{1}{Q} \sqrt{\frac{L}{C}} = \frac{1}{5} \sqrt{\frac{0.01}{10\times 10^{-9}}} = \frac{1000}{5} = 200 \, \Omega$.

Step 3: Compensate for Real-World Parasitics

This is where textbook theory fails on the bench. $R_{total}$ is not just the physical resistor you place on the board. It is the sum of three resistances:

  1. Source Impedance ($R_{source}$): A standard function generator has a 50 $\Omega$ output impedance.
  2. Inductor DCR ($R_{DCR}$): The Bourns 10 mH inductor has a typical DC resistance of 4.7 $\Omega$.
  3. Explicit Resistor ($R_{explicit}$): The physical resistor we need to buy.

$R_{explicit} = 200 \, \Omega - 50 \, \Omega - 4.7 \, \Omega = 145.3 \, \Omega$.

The closest standard 1% E96 resistor value is 147 $\Omega$ (Yageo MFR-25FBF52-147R). Our actual total resistance will be 201.7 $\Omega$, yielding a real-world Q of 4.95—well within tolerance.

Information Gain: Never ignore inductor DCR in high-Q designs. If you had blindly dropped a 200 $\Omega$ resistor into this circuit, your total R would be 254.7 $\Omega$, dropping your Q to 3.9 and widening your bandwidth by 27%. Always read the inductor datasheet.

Breadboard Testing: Step-by-Step Verification

With your Vishay capacitor, Bourns inductor, and 147 $\Omega$ resistor in hand, follow this procedure to verify the response on the bench.

  1. Isolate the Source: Connect your function generator's BNC-to-alligator clip to the breadboard. Set it to output a 2 Vpp sine wave. Crucial: Ensure the generator's output impedance is set to 50 $\Omega$ in its menu, matching our math above.
  2. Wire the Topology: Connect the generator positive to Node A. Place the 147 $\Omega$ resistor between Node A and Node B. Place the 10 mH inductor between Node B and Node C. Place the 10 nF capacitor between Node C and Ground. Connect the generator ground to the breadboard ground rail.
  3. Probe the Output: Connect your oscilloscope probe across the resistor (Node B to Ground). Use a 10x probe. A 1x probe adds ~100 pF of capacitance to your node, which will detune high-frequency circuits. While 100 pF won't ruin a 10 nF design (1% error), it will destroy a 100 pF RF tank circuit.
  4. Find the Peak: Set the scope to measure Vpp. Start sweeping the function generator frequency from 10 kHz up to 25 kHz. You should see the Vpp peak at exactly 15.9 kHz. At resonance, the output Vpp across the 147 $\Omega$ resistor should be roughly $2 \text{ Vpp} \times (147 / 201.7) \approx 1.45 \text{ Vpp}$.
  5. Measure Bandwidth: Note the peak voltage (1.45 Vpp). Calculate the -3dB voltage ($1.45 \times 0.707 = 1.02 \text{ Vpp}$). Sweep down in frequency until you hit 1.02 Vpp (Lower Cutoff, $f_L$). Sweep up until you hit 1.02 Vpp again (Upper Cutoff, $f_H$). Your bandwidth is $f_H - f_L$. Divide 15,915 Hz by this bandwidth to verify your Q-factor is ~5.

Final Decision Path: Which RLC Configuration Should You Build?

Use this decision tree to lock in your topology and component strategy for your next project.

If your application requires... Then choose this topology... And optimize this parameter...
Passing a single sensor frequency while rejecting broadband noise Series RLC (Output across R) High Q (Low R, low DCR inductor)
Eliminating a specific interference tone (e.g., 60 Hz hum) Parallel RLC (Tank in series with signal) High tank impedance (High L, low C)
Smoothing a PWM signal into a DC voltage LC Low-Pass (No explicit R, rely on load) Low inductor DCR to prevent voltage drop
Broadband impedance matching (e.g., antenna tuning) Series or Parallel depending on source/load Z Low Q (High R) for wide bandwidth

The Default Recommendation: If you are building a general-purpose audio or ultrasonic bandpass filter and have no strict constraints, build the 15.9 kHz Series RLC detailed in this guide (10 mH Bourns inductor, 10 nF X7R capacitor, 147 $\Omega$ 1% resistor). It uses cheap, through-hole components, avoids the extreme parasitic sensitivities of RF-frequency tanks, and provides a highly predictable Q of 5 when driven by a standard 50 $\Omega$ bench instrument.

For deeper mathematical derivations of RLC step-responses and damping ratios, consult the All About Circuits AC theory chapter or the Georgia State University HyperPhysics RLC database. Always verify your final design with a SPICE simulation (like LTspice) before committing to a custom PCB layout.