The resistance temperature relation dictates that as a conductor or semiconductor heats up, its electrical resistance changes. In copper traces and silicon MOSFET channels, resistance increases with temperature—a positive temperature coefficient (PTC). This creates a dangerous feedback loop on the bench: higher resistance means more I²R heat dissipation, which raises the component temperature further, increasing resistance again. Managing this relation through precise thermal path engineering is the entire basis of reliable power electronics design.
The Physics: Resistance Temperature Relation and TCR
Every material has a Temperature Coefficient of Resistance (TCR, denoted as α). For standard copper PCB traces, α is approximately 0.0039 /°C. The linear approximation for the resistance temperature relation is:
R_T = R_ref [1 + α (T - T_ref)]
If you design a motor controller assuming your copper busbar has a resistance of 10 mΩ at room temperature (25°C), that same busbar will measure roughly 13.5 mΩ when it heats up to 115°C under load. That 35% increase in resistance translates directly to a 35% increase in wasted wattage.
In power semiconductors, the effect is more pronounced. A silicon MOSFET’s R_DS(on) typically doubles from 25°C to 150°C. If you size your heatsink based on the 25°C R_DS(on) value printed on the first page of the datasheet, your silicon will cook. You must always calculate worst-case power dissipation using the hot resistance value.
Thermal Path Math: Junction to Ambient (RθJA)
How hot is too hot? Most commercial silicon has an absolute maximum junction temperature (T_J) of 150°C to 175°C. However, running a part at its absolute limit guarantees early death. A practical design target is keeping T_J below 110°C to 125°C.
To predict junction temperature, we use the thermal equivalent of Ohm’s Law, where temperature difference is voltage, power dissipation is current, and thermal resistance (Rθ) is electrical resistance:
T_J = T_A + P_D × (Rθ_JC + Rθ_CS + Rθ_SA)
- T_A: Ambient air temperature inside the enclosure (not the room temperature).
- P_D: Power dissipated in Watts (calculated using the hot resistance).
- Rθ_JC: Junction-to-Case thermal resistance (fixed by the silicon manufacturer).
- Rθ_CS: Case-to-Sink thermal resistance (determined by your thermal interface material).
- Rθ_SA: Sink-to-Ambient thermal resistance (determined by your heatsink and airflow).
Reading the Derating Curve
The derating curve on page 1 of a power datasheet is a straight line sloping from 100% allowable power dissipation at a case temperature (T_C) of 25°C down to 0W at T_J(max) (usually 175°C). If your thermal management design allows the case to reach 100°C, you are derated to roughly 50% of the headline wattage. The thermal resistance network must be engineered to keep the case cool enough to utilize the part's rated power.
| Parameter | Symbol | Typical Value | Unit |
|---|---|---|---|
| Junction-to-Case | Rθ_JC | 1.1 | °C/W |
| Junction-to-Ambient (No Heatsink) | Rθ_JA | 62.5 | °C/W |
| Max Junction Temperature | T_J(max) | 175 | °C |
Heatsink Selection and Airflow: A Worked Example
Let’s size a heatsink for an Infineon IRLB3034PbF MOSFET switching 30A continuously in an enclosure where the ambient air (T_A) reaches 45°C.
1. Calculate Hot Power Dissipation:
The IRLB3034 has an R_DS(on) of 1.9 mΩ at 25°C. Looking at the datasheet's temperature normalized graph, at 100°C the resistance is roughly 1.8 times higher: ~3.4 mΩ.
P_D = I² × R = 30² × 0.0034 = 3.06W.
2. Define Maximum Allowable Rθ_JA:
We want T_J to stay under 115°C.
Rθ_JA(max) = (T_J - T_A) / P_D = (115 - 45) / 3.06 = 22.8 °C/W.
3. Isolate the Required Heatsink (Rθ_SA):
Rθ_SA = Rθ_JA(max) - Rθ_JC - Rθ_CS
Assuming Rθ_JC = 1.1 °C/W and using a quality thermal paste (like Arctic Silver 5) yielding Rθ_CS ≈ 0.5 °C/W:
Rθ_SA = 22.8 - 1.1 - 0.5 = 21.2 °C/W.
4. Select the Hardware:
We need a heatsink with an Rθ_SA of 21.2 °C/W or lower. The Aavid Thermalloy 577202B00000G (a standard extruded TO-220 board-level heatsink) has a natural convection rating of roughly 24 °C/W. This is too close to our margin.
What Airflow and Enclosure Changes Buy You:
Instead of buying a massive, expensive extrusion, we can alter the boundary conditions. Adding a small 40mm brushless fan pushing 10 CFM across the Aavid 577202B00000G drops its effective Rθ_SA to approximately 8 °C/W. This gives us massive thermal headroom, dropping the predicted T_J to roughly 73°C. Alternatively, moving the MOSFET to the outer aluminum chassis of the enclosure turns the entire chassis into the heatsink, dropping Rθ_SA to roughly 2 °C/W.
Failure Signatures of Thermal Stress
When the resistance temperature relation drives a component past its thermal limits, failure is rarely instantaneous. It manifests in specific, diagnosable signatures:
- Thermal Runaway: In parallel MOSFET configurations, if one device gets slightly hotter, its R_DS(on) increases. It sheds current to its cooler parallel siblings, which then heat up and shed current back. If the gate drive isn't perfectly matched, one device can hog the current until it exceeds its Safe Operating Area (SOA) and melts.
- Solder Creep and Fatigue: Repeated thermal cycling (heating up under load, cooling down at idle) causes the silicon die, copper leadframe, and PCB pad to expand at different rates (Coefficient of Thermal Expansion mismatch). Over hundreds of cycles, the TO-220 lead solder joints develop micro-cracks, eventually lifting the ground pad and causing a sudden spike in Rθ_JC.
- Electromigration: At high current densities and elevated temperatures (>100°C), metal atoms in the silicon interconnects are physically pushed by electron flow. This thins the traces until they snap open, presenting as a mysterious 'dead' IC that tests fine at room temperature but fails under load.
- Die Attach Delamination: The epoxy or solder bonding the silicon die to the copper slug degrades. You will see this on a thermal camera as a localized 'hot spot' on the surface of the plastic package, indicating the heat is no longer spreading evenly into the heatsink.
FAQ: Resistance and Temperature in Circuit Design
How does the resistance temperature relation affect copper trace sizing?
Standard PCB trace width calculators (like those based on IPC-2152) assume a specific temperature rise (usually 10°C or 20°C) above ambient. Because copper has a positive TCR, a trace sized for exactly 5A with a 20°C rise will have a higher resistance at its operating temperature than at room temperature. If your enclosure ambient spikes, the trace resistance increases, generating more heat, which increases resistance further. Always add a 20% width margin for high-current traces operating in poorly ventilated enclosures to break this feedback loop.
Why do NTC thermistors have a non-linear resistance temperature relation?
Negative Temperature Coefficient (NTC) thermistors are made of sintered metal oxides. Unlike the linear PTC behavior of pure metals, the resistance of an NTC drops exponentially as temperature rises. This is governed by the Steinhart-Hart equation, not the simple linear TCR formula. Because of this extreme non-linearity, NTCs are excellent for inrush current limiting (they start with high resistance and heat themselves into low resistance) and for temperature sensing, but they require lookup tables or complex math in your microcontroller to yield accurate linear temperature readings.
Can I use the resistance temperature relation to measure junction temperature?
Yes, this is a standard industry technique called the Temperature-Sensitive Parameter (TSP) method. By injecting a small, known measurement current through a power diode or MOSFET body diode and measuring the forward voltage drop, you can calculate the exact junction temperature. The forward voltage of a silicon PN junction drops by roughly 2 mV per °C. Engineers use this relation to measure the true internal T_J immediately after shutting off a high-power load, bypassing the thermal lag of external case-mounted thermocouples.
