A positive feedback system in electronics routes a portion of the output signal back to the input in phase with the original signal, reinforcing it to drive the circuit rapidly toward saturation, oscillation, or a latched state. While negative feedback tames an amplifier to make it linear and predictable, positive feedback deliberately pushes a circuit into non-linearity. It changes a stable, linear amplifier into a bistable memory element, an astable oscillator, or a comparator with hysteresis. In the broader world, people commonly confuse this technical concept with 'negative feedback' (which reduces gain and stabilizes circuits) or the colloquial management term 'positive feedback' (meaning praise or constructive reinforcement). On the workbench, however, it is the deliberate mechanism we use to force a chip to make a hard, irreversible decision.
The Mechanics of In-Phase Reinforcement
To understand how this works, we look at loop gain. In any feedback loop, the signal passes through the amplifier (gain $A$) and then through the feedback network (attenuation $\beta$). The product of these two is the loop gain ($A\beta$).
In a positive feedback topology, the fed-back signal arrives at the input with the same polarity as the incoming signal. If the loop gain is less than 1, the signal eventually dies out. But if the loop gain is equal to or greater than 1, the system becomes regenerative. Any tiny noise or transient at the input is amplified, fed back, amplified again, and fed back again, growing exponentially until the active device (transistor or op-amp) hits its physical voltage rails. This is the Barkhausen criterion for oscillation, and it is the foundational physics behind everything from digital memory cells to radio frequency transmitters.
Worked Example: Calculating Hysteresis in an LM393 Schmitt Trigger
The most common bench application of positive feedback is adding hysteresis to a comparator to prevent output chatter when digitizing a slow-moving or noisy analog signal. Let us calculate the exact thresholds for a non-inverting Schmitt trigger using a real-world component: the LM393 dual comparator.
Circuit Parameters:
- Supply Voltage ($V_{CC}$): 5.0V
- Reference Voltage ($V_{REF}$) at inverting (-) pin: 2.5V
- Input Resistor ($R_1$) from $V_{IN}$ to non-inverting (+) pin: 10kΩ
- Feedback Resistor ($R_2$) from $V_{OUT}$ to non-inverting (+) pin: 100kΩ
- Pull-up Resistor on open-collector output: 10kΩ to 5.0V
The voltage at the non-inverting pin ($V_+$) is determined by the superposition of $V_{IN}$ and $V_{OUT}$:
$V_+ = \frac{(V_{IN} \times R_2) + (V_{OUT} \times R_1)}{R_1 + R_2}$
Calculating the Upper Threshold ($V_{UT}$):
Assume the output is currently LOW. Because the LM393 has an open-collector output, it does not pull all the way to 0V; it saturates at approximately 0.2V. The output will switch HIGH when $V_+$ rises to meet $V_{REF}$ (2.5V).
$2.5 = \frac{(V_{IN} \times 100k) + (0.2 \times 10k)}{110k}$
$275k = 100k(V_{IN}) + 2k$
$V_{IN} = \frac{273k}{100k} = 2.73V$
Calculating the Lower Threshold ($V_{LT}$):
Assume the output is currently HIGH. The open-collector is pulled up to exactly 5.0V. The output will switch LOW when $V_+$ falls to meet $V_{REF}$ (2.5V).
$2.5 = \frac{(V_{IN} \times 100k) + (5.0 \times 10k)}{110k}$
$275k = 100k(V_{IN}) + 50k$
$V_{IN} = \frac{225k}{100k} = 2.25V$
Where You Meet This in Practice
Positive feedback is not just a textbook quirk; it is the backbone of modern digital and mixed-signal electronics. According to standard comparator application guides, you will encounter this topology in three primary scenarios:
- Switch Debouncing: Mechanical contacts bounce, creating a chaotic flurry of make-and-break connections. A Schmitt trigger (positive feedback) locks the output state after the first edge, ignoring the subsequent 5ms of contact chatter.
- Relaxation Oscillators: The classic NE555 timer uses internal comparators with positive feedback latches (an SR flip-flop) to create clean square waves from a slow-charging RC network.
- Static RAM (SRAM) Cells: Every bit of memory in your microcontroller's SRAM is stored in a bistable latch made of two cross-coupled CMOS inverters. The output of inverter A feeds the input of inverter B, and vice versa. This positive feedback loop holds the 1 or 0 state indefinitely as long as power is applied.
Decision Tree: Choosing Your Feedback Topology
When designing a signal conditioning stage, selecting the wrong feedback network will result in either a sluggish response or a circuit that oscillates out of control. Use this decision matrix to lock in your topology.
| Design Goal | Required Topology | Concrete Part / Implementation |
|---|---|---|
| Clean up a noisy, slow-moving analog sensor signal | Comparator with Positive Feedback (Schmitt Trigger) | LM393 with 10kΩ/100kΩ resistor divider |
| Digitize a clean, fast-moving RF or audio signal | High-Speed Comparator (No Feedback) | TLV3501 (4.5ns delay, no external hysteresis needed) |
| Generate a fixed-frequency clock pulse | Astable Multivibrator (Positive Feedback + RC delay) | NE555 (Low freq) or 74HC14 Crystal Osc (High freq) |
| Store 1 bit of digital state without a clock | Bistable Latch (Cross-coupled Positive Feedback) | 74HC74 D-Flip Flop or discrete 2N2222 multivibrator |
| Amplify an audio signal with flat frequency response | NEGATIVE Feedback (Do not use positive) | OPA1678 with 1kΩ/10kΩ feedback network |
Default Recommendation: If you are building a custom sensor interface and need to digitize a slow-moving analog signal without chatter, default to an LM393 dual comparator with a 10kΩ/100kΩ positive feedback network. It costs under $0.20 in reel quantities, handles up to 36V on the supply pins, and its open-collector output interfaces directly with 3.3V or 5V microcontrollers without frying the GPIO.
Common Pitfalls and Layout Parasitics
Theory assumes ideal components; the workbench does not. When implementing positive feedback at speeds above 100kHz, layout parasitics will fight your math.
- Trace Capacitance: The feedback resistor ($R_2$) runs parallel to your ground plane. At high frequencies, the parasitic capacitance of the PCB trace acts as a low-pass filter, delaying the feedback signal. If the feedback arrives late, the comparator will chatter. Fix: Keep feedback traces under 5mm and route them directly over a solid ground plane to maintain a predictable, calculable capacitance.
- Ground Bounce: When the LM393 output snaps from HIGH to LOW, it sinks current through the ground pin. If your ground trace is too thin, the local ground potential spikes upward for a few nanoseconds. Because your $V_{REF}$ divider is tied to this same ground, the reference voltage spikes too, causing a false trigger. Fix: Use a star-ground topology or a dedicated ground pour directly under the comparator.
- Missing Pull-Ups: Beginners often forget that the LM393 has an open-collector output. Without a pull-up resistor to $V_{CC}$, the positive feedback network receives 0V in both states, resulting in zero hysteresis. Always include a 4.7kΩ to 10kΩ pull-up resistor.
Frequently Asked Questions
Can I use an op-amp instead of a comparator for a Schmitt trigger?
You can, but you shouldn't for high-speed signals. General-purpose op-amps like the LM358 are internally compensated for stability (negative feedback) and suffer from long recovery times when driven into saturation. A dedicated comparator like the LM393 or LM311 is designed to snap out of saturation in nanoseconds.
Does positive feedback always cause oscillation?
No. Oscillation requires positive feedback and a phase shift (usually provided by an RC or LC network) that satisfies the Barkhausen criterion at a specific frequency. If the feedback is purely DC (like in a Schmitt trigger or an SR latch), the circuit simply latches into one of two stable saturated states and stays there.
How do I increase the hysteresis band?
Decrease the value of the feedback resistor ($R_2$) relative to the input resistor ($R_1$). Moving from a 100kΩ feedback resistor to a 47kΩ resistor will widen the threshold gap, making the circuit more immune to heavy noise, but at the cost of reduced switching precision.






