Practical Pi Filter Design: Sizing CLC and CRC Networks for Clean DC

A pi filter is a three-component passive LC or RC network arranged in a π topology to attenuate specific frequencies, most commonly used to smooth DC power supply ripple or block RF interference. By placing two shunt capacitors separated by a series reactive or resistive element, it drastically changes a pulsating, rectified AC waveform into a flat, usable DC rail, or isolates sensitive RF stages from broadband noise. Unlike simple single-capacitor filters that leave residual AC hum, the pi topology provides a second-order (or higher) roll-off that aggressively crushes unwanted frequencies while passing DC.

Core Topologies and Component Selection

When engineers talk about pi filter design, they are usually referring to one of two low-pass configurations: the CLC (Capacitor-Inductor-Capacitor) or the CRC (Capacitor-Resistor-Capacitor). The choice between them dictates your DC voltage drop, current handling, and high-frequency attenuation limits.

A CLC filter uses an inductor as the series element. Because an ideal inductor has zero DC resistance, it passes the DC load current without dropping voltage, making it the undisputed king for high-current power supplies. However, inductors are bulky, expensive, and can radiate magnetic fields if unshielded. A CRC filter swaps the inductor for a simple resistor. It is cheap, compact, and immune to magnetic coupling, but the resistor burns power as heat ($I^2R$) and drops the DC voltage, restricting its use to low-current signal stages.

Worked Numeric Example: Sizing a 12V CLC Power Supply Filter

Let’s design a CLC pi filter for a bench linear power supply. The load draws a steady 1A at 12V DC. The raw rectified DC comes from a full-wave bridge rectifier on a 60Hz mains transformer, meaning our primary ripple frequency is 120Hz.

Step 1: Determine the Input Ripple ($V_{in(ripple)}$)
Before the pi filter, we have a bulk reservoir capacitor ($C_1$). Let’s size $C_1$ at 4700µF. The peak-to-peak ripple voltage on this first capacitor is approximated by:

$V_{ripple(p-p)} = \frac{I_{load}}{f \times C_1}$

$V_{ripple(p-p)} = \frac{1A}{120Hz \times 0.0047F} = 1.77V$

Step 2: Define the Target Output Ripple
For a clean bench supply powering sensitive analog circuits, we want the final output ripple ($V_{out(ripple)}$) to be under 50mV (0.05V). This means our pi filter (consisting of $L$ and $C_2$) must provide an attenuation factor of at least $1.77V / 0.05V = 35.4$.

Step 3: Select $L$ and $C_2$
For an LC filter where the ripple frequency is well above the resonant frequency, the attenuation factor $A$ is roughly:

$A \approx (2 \pi f)^2 \times L \times C_2$

Let’s select a readily available 20mH (0.02H) toroidal choke rated for at least 1.5A DC to avoid core saturation. Now we solve for $C_2$:

$35.4 = (2 \pi \times 120)^2 \times 0.02 \times C_2$
$35.4 = (753.98)^2 \times 0.02 \times C_2$
$35.4 = 568,488 \times 0.02 \times C_2$
$35.4 = 11,369 \times C_2$
$C_2 = 0.00311F$ (or 3110µF)

We will round up to a standard 3300µF electrolytic capacitor for $C_2$. With these values, the final output ripple drops to approximately 47mV, meeting our design target. Note that this calculation assumes a relatively light load; under heavy dynamic loads, the ESR (Equivalent Series Resistance) of $C_2$ will dominate the high-frequency ripple, which is why builders often parallel the 3300µF electrolytic with a 10µF X7R MLCC ceramic capacitor to kill high-frequency switching spikes.

Where You Meet Pi Filters in Practice

You will rarely see a schematic explicitly labeled 'Pi Filter,' but the topology is hiding in plain sight across almost every mixed-signal and power board on your workbench.

• Switch-Mode Power Supplies (SMPS): The output stage of a buck converter almost always features an LC pi filter. The switching node (SW) pulses at 500kHz to 2MHz. A ferrite bead (acting as a lossy inductor) paired with a 22µF ceramic capacitor forms a high-frequency pi network that prevents switching hash from reaching your microcontroller's VCC pin.
• Audio DACs and ADCs: Mixed-signal ICs like the PCM1794 or ES9038 require ultra-clean analog rails. Designers use CRC pi filters (often with 10Ω resistors and 100nF/10µF caps) on the AVDD pins to isolate the sensitive analog core from the noisy digital system bus.
• RF Transceiver Front-Ends: In ESP32 or LoRa RF matching networks, high-pass CLC pi filters are used as harmonic traps. They pass the 2.4GHz fundamental frequency but shunt the 4.8GHz and 7.2GHz harmonics to ground to pass FCC/CE emissions testing.
• Tube Amplifiers: Classic guitar amps use massive CLC pi filters (sometimes called 'choke-input' filters) with 5H to 10H iron-core chokes and 47µF oil-filled capacitors to eliminate the 120Hz mains hum from the high-voltage B+ rail.

Common Confusions and Inrush Pitfalls

When moving from theory to the soldering iron, a few specific failure modes routinely trap hobbyists and junior engineers.

Pi Filters vs. Pi Attenuators

The most common terminology mix-up is confusing a reactive pi filter with a resistive pi attenuator. A pi filter uses capacitors and inductors to block specific frequencies while passing DC or other bands with minimal power loss. A pi attenuator uses three resistors to drop signal amplitude across all frequencies while maintaining a specific characteristic impedance (usually 50Ω or 75Ω). If you need to drop a 5V logic signal down to 3.3V for an ESP32 GPIO, you want a voltage divider, not a pi filter. If you need to knock down a +10dBm RF signal to 0dBm for a spectrum analyzer input, you want a 10dB pi attenuator.

The Inductor Saturation Trap

Inductors are not magical; they are physical coils of wire around a magnetic core. Every inductor has a DC Bias Current rating. If your circuit draws 2A, but you selected a 47µH power inductor rated for 1.5A saturation current ($I_{sat}$), the magnetic core will saturate. Once saturated, the core loses its permeability, and the inductance plummets—often dropping from 47µH down to 2µH. Your pi filter effectively becomes a single capacitor, and your high-frequency noise suppression vanishes. Always check the datasheet's 'Inductance vs. DC Bias' curve and derate by at least 20%.

PCB Layout: The Hidden Parasitics

At frequencies above 10MHz, your PCB traces become inductors and your capacitors become resonant tanks. If you place the series inductor three inches away from the shunt capacitor on a breadboard, the trace inductance will completely bypass your filter design. For high-frequency SMPS or RF pi filters, the shunt capacitor ($C_2$) must be placed immediately adjacent to the IC's VCC and GND pins, using wide, short traces and multiple vias to minimize parasitic loop inductance. For a deep dive into high-frequency layout parasitics, the Analog Devices Application Engineer series provides excellent guidelines on minimizing trace inductance in decoupling networks. Furthermore, All About Circuits offers a solid foundational review on how parasitic capacitance can ruin the roll-off slope of passive low-pass filters.

Mastering pi filter design is less about memorizing complex transfer functions and more about respecting the physical limitations of your components. Size your inductor for the DC load current, calculate your capacitance for the specific ripple frequency, and always verify the final output with an oscilloscope using a tip-and-barrel probe to avoid ground-lead antenna pickup.