If you are designing a standard 1 oz external copper trace to carry 1A of continuous DC current with a 10°C temperature rise, you need a 10 mil (0.254 mm) trace width. If that current jumps to 3A, you must widen the trace to 50 mils. These are the foundational numbers of PCB layout basics, yet they are frequently guessed rather than calculated. Moving from a solderless breadboard to a custom printed circuit board introduces permanent physical constraints: copper has resistance, traces have inductance, and poor layout decisions will bake into your fiberglass.

This guide provides the exact trace sizing data you need, a checklist to eliminate prototyping artifacts, and a rigorous first-spin testing protocol to ensure your board powers up without releasing the magic smoke.

Trace Width vs. Current: The Copper Weight Table

Trace ampacity is governed by the IPC-2221 standard, which calculates width based on allowable temperature rise, copper cross-sectional area, and whether the trace is on an external or internal layer. External layers dissipate heat via convection to the ambient air, while internal layers rely entirely on conduction through the FR4 substrate, which is a thermal insulator. As a rule of thumb, internal traces can only handle about half the current of external traces of the same width.

Use the reference table below to size your power and ground traces. These values assume a standard FR4 board in still air. For a highly reliable calculator that accounts for trace thickness and ambient temperature, the Saturn PCB Toolkit remains the industry-standard free utility for layout engineers.

Table 1: DC Trace Width Requirements (mil) by Current and Copper Weight
Current (A) 10°C Rise (1oz External) 20°C Rise (1oz External) 10°C Rise (2oz External) 10°C Rise (1oz Internal)
0.5 5 mil 3 mil 3 mil 10 mil
1.0 10 mil 6 mil 5 mil 20 mil
2.0 30 mil 15 mil 15 mil 60 mil
3.0 50 mil 25 mil 25 mil 100 mil
5.0 110 mil 55 mil 55 mil 200 mil

The Via Bottleneck

A common failure mode in PCB layout basics is routing a massive 100-mil power trace on the top layer, then dropping it to an internal plane through a single standard via. A typical 0.3 mm (12 mil) drilled via with 1 oz copper plating has a barrel thickness of roughly 1 mil. That single via will overheat and fail at currents above 1A. Always use multiple vias in parallel for power routing. For a 3A rail, drop at least four 0.3mm vias near the connector or power entry point to distribute the current and lower the inductance.

Breadboard-to-PCB Migration: Mistakes That Survive the Jump

Solderless breadboards are excellent for proving a circuit concept, but they mask fatal electrical flaws. The metal spring contacts inside a breadboard introduce 2pF to 5pF of parasitic capacitance between adjacent rows, and the long jumper wires act as unpredictable inductors. When you transition to a PCB, these parasitics vanish, and the mistakes you ignored on the bench will suddenly cause oscillations, noise, or total failure.

Before finalizing your Gerber files, run through this migration checklist to ensure your layout survives the jump from prototype to production.

The Migration Checklist

  • Local Decoupling Placement: On a breadboard, a 100nF capacitor placed three rows away from an IC works fine. On a PCB, the trace inductance will render it useless at high frequencies. Place 100nF X7R MLCC capacitors within 2mm of the IC VCC pin, with a dedicated thermal via dropping directly to the ground plane. For comprehensive decoupling strategies, refer to the SparkFun PCB Layout Tutorial.
  • Ground Topology: Breadboards force you to daisy-chain ground connections via jumper wires. Never replicate this on a PCB. Dedicate an entire inner layer (Layer 2 on a 4-layer board, or the bottom layer on a 2-layer board) to a solid, unbroken copper ground plane. This provides a low-impedance return path and minimizes EMI.
  • High-Speed Return Paths: If you are routing a 50-ohm controlled impedance trace (like USB or Ethernet), the signal current returns directly underneath the trace on the reference plane. If you cut a slot in the ground plane under that trace to route another signal, the return current is forced to loop around the slot, creating a massive antenna that will fail FCC emissions testing.
  • Component Footprint Verification: Breadboards use generic 0.1-inch pitch spacing. PCBs use exact manufacturer dimensions. Always print your PCB layout on paper at 1:1 scale and physically place your actual components on the paper before ordering the boards. This catches SOT-23 pinout swaps and connector housing interferences that the CAD software won't flag.

First-Spin Board Testing and Workshop Safety

When your first-spin boards arrive from the fab house, the goal is to verify electrical integrity before applying full power. A dead short on a custom board can destroy your bench power supply, burn the USB port on your programming laptop, or delaminate the FR4 fiberglass.

The Power-Up Sequence

  1. Visual Inspection: Use a 10x jeweler's loupe or a digital microscope to inspect all QFN, SOIC, and 0603 passive pads. Look for solder bridges caused by excessive stencil aperture sizes or insufficient reflow temperatures.
  2. The DMM Short Test: Set your multimeter to continuity or diode mode. Place the red probe on the main VCC rail and the black probe on GND. You should read an open circuit (OL) or a high resistance (>10kΩ). If your board has large bulk electrolytic capacitors, you may hear a brief beep as the meter's internal battery charges the cap, but it should quickly rise to OL. A persistent dead short means you have a backwards tantalum capacitor, a solder bridge under an IC, or a misrouted power plane.
  3. Current-Limited Power Up: Never plug a first-spin board directly into a wall adapter or a laptop USB port. Use a bench power supply with adjustable Over-Current Protection (OCP). Set the voltage to your nominal rail (e.g., 3.3V) and set the current limit to 50mA. Power the board. If the supply immediately hits the 50mA limit and the voltage drops to near zero, you have a fault. If the board draws 12mA and the voltage holds steady, your basic power tree is intact.

Workshop Safety: Soldering Alloys and Fume Extraction

Hand-soldering rework on a first-spin board requires strict attention to metallurgy and ventilation. The alloy you choose dictates your iron temperature, which directly impacts pad liftoff risk.

⚠️ Workshop Safety Note: Flux vapors are not harmless water steam. Rosin-based (colophony) and synthetic fluxes off-gas volatile organic compounds and particulate matter that are known respiratory sensitizers and can trigger occupational asthma. You must use an active fume extraction system (such as a benchtop unit with a HEPA and activated carbon filter) positioned within 6 inches of the solder joint. Never rely on an open window or a standard desk fan, which merely blows the particulates into your breathing zone.

Match your soldering station tip temperature to your specific alloy:

  • SAC305 (Sn96.5 / Ag3.0 / Cu0.5): This is the standard lead-free alloy. It has a higher melting point (217°C) and poor wetting characteristics compared to leaded solder. Set your iron tip to 350°C–380°C. Use a high-activity no-clean flux pen to assist wetting, and allow 2-3 seconds of dwell time per joint.
  • Sn63/Pb37 (Eutectic Leaded): The gold standard for hobbyist and prototyping rework due to its sharp melting point (183°C) and excellent flow. Set your iron tip to 315°C–325°C. Exceeding 350°C with leaded solder will rapidly oxidize your iron tip and degrade the flux core before it can clean the pad.

By calculating your trace widths against the IPC-2221 baseline, eliminating breadboard parasitics in your layout, and enforcing a strict current-limited testing protocol, you transition from guessing to engineering. Your first-spin boards will power up cleanly, and your design iterations will drop from weeks to days.