The OR boolean table defines the foundational logical operation where the output is TRUE (1) if at least one input is TRUE. In physical electrical terms, this is the exact equivalent of wiring two switches in parallel to control a single load. Whether you are programming an Allen-Bradley MicroLogix PLC using ladder logic, wiring electromechanical control relays, or prototyping on a breadboard with a TI SN74HC32 quad 2-input OR gate IC, the underlying logic remains identical. Below is the complete reference chart, hardware realities, and installation modifiers you need to bridge theoretical logic with physical wiring.
The Standard 2-Input OR Boolean Table
How to read this table: This chart maps the logical state of two inputs (A and B) to a single output (Y). The columns represent discrete voltage levels or physical contact states. A logic 0 represents LOW voltage (typically 0V to 0.8V in TTL/CMOS), a FALSE boolean state, or an OPEN physical switch. A logic 1 represents HIGH voltage (typically 2.0V to 5V), a TRUE boolean state, or a CLOSED physical switch. The Output (Y) column dictates the resulting state delivered to your load, coil, or next logic stage.
| Input A | Input B | Output Y (Logic) | Physical Relay Equivalent | PLC Ladder Instruction |
|---|---|---|---|---|
| 0 (LOW / Open) | 0 (LOW / Open) | 0 (LOW) | Circuit Open (No path to coil) | XIC (Examine If Closed) = False |
| 1 (HIGH / Closed) | 0 (LOW / Open) | 1 (HIGH) | Current flows through Switch A | Parallel XIC branch A = True |
| 0 (LOW / Open) | 1 (HIGH / Closed) | 1 (HIGH) | Current flows through Switch B | Parallel XIC branch B = True |
| 1 (HIGH / Closed) | 1 (HIGH / Closed) | 1 (HIGH) | Current flows through both (redundant) | Both parallel branches = True |
Modifying the Base Table: Active-Low and Inverted Inputs
Just as wire ampacity tables require derating for temperature and conduit fill, an OR boolean table requires logical modification when dealing with real-world sensors and inverted inputs. The base table above assumes active-high logic (where a closed switch or HIGH voltage equals a logical 1). However, industrial installations frequently use sinking (NPN) sensors or active-low emergency stop circuits.
When your physical installation uses active-low inputs, the base table is effectively inverted before it reaches the OR gate. For example, if you wire an NPN proximity sensor to Input A, the sensor outputs 0V (Logic 0) when it detects a target, and floats (pulled up to 24V, Logic 1) when clear.
How this modifies the table: To achieve an OR function where the output triggers when either sensor detects a target, you cannot use a standard OR gate. You must use a NAND gate (per De Morgan's Laws) or invert the inputs via PLC XIO (Examine If Open) instructions. If you force an active-low sensor into a standard OR boolean table without inversion, your logic will trigger when the sensor is absent, creating a critical safety failure in automated machinery. Always verify whether your sensor is sourcing (PNP/Active-High) or sinking (NPN/Active-Low) before mapping it to the A and B columns.
Hardware Realities: What the Table Cannot Tell You
A boolean table is a mathematical abstraction. It assumes instantaneous transitions and infinite current capacity. When moving from simulation to the workbench, the table fails to account for three critical hardware realities:
- Propagation Delay ($t_{pd}$): The table implies Output Y changes the exact nanosecond Input A changes. In reality, a standard TI SN74HC32 OR gate operating at 5V has a typical propagation delay of 15ns. While negligible for simple relay control, in high-speed SPI or RF-enable lines, cascading multiple OR gates can accumulate enough delay to cause timing violations.
- Contact Bounce: If Inputs A and B are physical mechanical relays or limit switches wired in parallel, closing the contact will cause mechanical bounce for 5ms to 20ms. The boolean table will see this as a rapid 0-1-0-1-1 sequence. If your Output Y drives a microcontroller interrupt or a high-speed counter, you must implement hardware debouncing (an RC filter) or software debouncing, as the table assumes clean digital edges.
- Voltage Thresholds and Fan-Out: The table uses '0' and '1'. But for a 5V CMOS IC, a Logic 1 requires a minimum Input High Voltage ($V_{IH}$) of 3.15V. If your Input A is driven by an older 5V TTL chip that only outputs 2.4V for a HIGH state, the OR gate may read it as an undefined state or a LOW, breaking the truth table entirely. Always match logic families (e.g., 74HCT series for TTL-to-CMOS interfacing).
Frequently Asked Questions
How do I map a 3-input OR boolean table using standard 2-input ICs?
Standard logic ICs like the 74HC32 contain four independent 2-input OR gates. To create a 3-input OR function (where Output is 1 if A, B, or C is 1), you must cascade them. Wire Inputs A and B into the first OR gate. Take the output of that first gate and wire it into Input A of the second OR gate. Wire your third input (C) into Input B of the second OR gate. The output of the second gate is your final 3-input OR result. Note that this cascading doubles the propagation delay for signals passing through the first gate.
What is the difference between an OR boolean table and an XOR table in motor control?
In an OR table, the output is HIGH if any input is HIGH, including when both are HIGH (1 OR 1 = 1). In an XOR (Exclusive OR) table, the output is HIGH only if the inputs are different (1 XOR 1 = 0). In motor control and lighting, an OR table is used for multi-location start/stop stations (any start button runs the motor). An XOR table is used for 3-way and 4-way residential lighting switches, where toggling any switch changes the state of the light, which mathematically maps to an XOR function rather than a standard OR.
Which column applies to my PLC installation when using sinking (NPN) sensors?
If you are wiring sinking (NPN) sensors to a standard sourcing PLC input card, the physical '1' column in the boolean table actually represents the sensor's OFF state, and the '0' column represents the sensor's ON (sinking) state. To make the PLC logic match the standard OR boolean table, you must use XIO (Examine If Open) instructions in your ladder logic instead of XIC (Examine If Closed). This logically inverts the active-low hardware signal back into an active-high boolean variable that the PLC's internal OR instructions can process correctly.
