The voltage gain of an inverting operational amplifier is defined by a single, elegant ratio: Av = -Rf / Rin. If you place a 100kΩ feedback resistor (Rf) and a 10kΩ input resistor (Rin) into the standard topology, your gain is exactly -10. Feed it a 0.2V DC signal, and the output will swing to -2.0V. The negative sign indicates a 180-degree phase inversion.
While the math is trivial, the physical implementation on a breadboard or PCB is where hobbyists and students run into noise, oscillation, and loading issues. This guide breaks down the exact op amp inverting amplifier circuit diagram you need, maps the critical nodes, and walks through selecting real-world components like the TL072 to ensure your circuit behaves in reality exactly as it does in simulation.
The Inverting Topology: Node Labels and Core Behavior
To troubleshoot or design effectively, you must map the physical pins to the theoretical nodes. Assuming a standard 8-pin DIP op amp (like the TL072 or LM358), the circuit relies on four critical nodes:
- Node 1 (Vin): The signal source, connected through the input resistor (Rin).
- Node 2 (Summing Junction / V-): The inverting input (Pin 2). This is a "virtual ground"—the op amp will drive its output to keep this node at the exact same voltage as the non-inverting input.
- Node 3 (Reference / V+): The non-inverting input (Pin 3), tied directly to your ground reference (0V) in a standard dual-supply inverting setup.
- Node 4 (Vout): The output (Pin 1 or 7), which feeds back to Node 2 through the feedback resistor (Rf).
Understanding how the circuit reacts to component changes is critical for tuning bandwidth and noise. The table below outlines the core behavior shifts when you alter the passive elements.
| Component Change | Effect on Gain | Effect on Input Impedance | Secondary Consequence |
|---|---|---|---|
| Increase Rf (e.g., 10k to 100k) | Magnitude increases | Unchanged (set by Rin) | Bandwidth drops; thermal noise increases |
| Increase Rin (e.g., 1k to 10k) | Magnitude decreases | Increases | Reduces loading on the signal source |
| Lift Node 3 (V+ floats) | Unpredictable | Unchanged | Output saturates to a rail due to offset voltage |
| Replace Rf with a Capacitor | Frequency-dependent | Unchanged | Circuit becomes an analog integrator |
Inverting vs. Non-Inverting: Why Choose This Topology?
Why use the inverting configuration when the non-inverting topology offers the same amplification without the phase flip? The decision comes down to input impedance requirements, virtual ground benefits, and the need for attenuation.
| Criterion | Inverting Amplifier | Non-Inverting Amplifier |
|---|---|---|
| Input Impedance | Low (Exactly equal to Rin) | Extremely High (Op amp's own input impedance) |
| Phase Shift | 180° (Inverted) | 0° (Same phase) |
| Attenuation (Gain < 1) | Yes (e.g., Rin=10k, Rf=1k yields -0.1) | No (Minimum gain is always +1) |
| Summing Capability | Excellent (Virtual ground isolates inputs) | Poor (Inputs interact via voltage dividers) |
Choose the inverting topology when: You need to sum multiple audio or sensor signals (like a simple mixer), when you need to attenuate and invert a signal simultaneously, or when your source has a very low output impedance and won't be loaded down by a 10kΩ Rin.
Choose the non-inverting topology when: You are buffering a high-impedance source like a piezo sensor or a passive guitar pickup, where drawing current through Rin would collapse the signal voltage.
Design Walkthrough: Picking Real Component Values
Let’s design a circuit to amplify a 200mV peak AC sensor signal to 2V peak. We need a gain of -10. According to the formula, we need a 10:1 ratio between Rf and Rin. But which absolute values do we pick? 10Ω and 100Ω? 1MΩ and 10MΩ?
Neither. The "Goldilocks zone" for op amp resistors in general-purpose audio and sensor circuits is between 1kΩ and 100kΩ.
- Too low (e.g., 100Ω / 1kΩ): The op amp's output stage must source/sink high current to drive Rf. This increases distortion, wastes power, and may exceed the op amp's short-circuit current limit.
- Too high (e.g., 1MΩ / 10MΩ): You invite thermal (Johnson-Nyquist) noise. Furthermore, the op amp's input bias current flowing through these massive resistors creates a significant DC offset voltage at the output.
For this build, we will use Rin = 10kΩ and Rf = 100kΩ. We will use the Texas Instruments TL072, a JFET-input dual op amp that costs roughly $0.80 to $1.20 in 2026. It offers low noise and exceptionally low input bias current (typically 5 pA), making it ideal for 100kΩ feedback networks.
If you were using a BJT-input op amp like the LM358, input bias current (typically 20 nA) flowing through the 100kΩ feedback network would create a 2mV DC offset. To fix this, you'd add a compensation resistor (Rcomp) from the non-inverting pin to ground, valued at Rin || Rf (approx 9.1kΩ). Because the TL072 uses JFET inputs with picoamp-level bias currents, Rcomp is unnecessary and only adds noise. Always check the datasheet's input bias current spec before adding compensation resistors.
| Component | Value / Part Number | Specification Notes |
|---|---|---|
| U1 (Op Amp) | TL072CP (8-pin DIP) | Dual JFET, ±15V supply, low noise |
| Rin (Input) | 10kΩ | 1% tolerance, 1/4W metal film (e.g., Yageo MFR-25) |
| Rf (Feedback) | 100kΩ | 1% tolerance, 1/4W metal film |
| C1, C2 (Decoupling) | 100nF (0.1µF) | X7R Ceramic, placed physically adjacent to VCC/VEE pins |
Failure Modes: What Breaks at the Extremes?
When a breadboard circuit misbehaves, it is usually due to a wiring error that simulates a short or open component. Here is how the inverting topology fails at the extremes, which is invaluable for debugging with a multimeter.
- Rf is Shorted (0Ω): The output (Node 4) is tied directly to the inverting input (Node 2). The op amp forces Node 2 to match Node 3 (0V). Therefore, Vout is locked at 0V regardless of the input signal. The input signal simply sees Rin as a path to ground.
- Rf is Open (Disconnected): The feedback loop is broken. The op amp operates in open-loop mode with a gain of 100,000+. Microvolt-level noise or offset voltages at the inputs will instantly drive the output to hard saturation against either the positive or negative supply rail.
- Rin is Shorted (0Ω): The signal source is connected directly to the summing junction. If Vin rises above 0V, the op amp attempts to drive Vout negative to pull the summing junction back to 0V. However, because there is no Rf to drop the voltage, the op amp will slam into the negative rail, and excessive current may flow through the source or the op amp's internal input protection diodes.
- Node 3 (V+) is Floating: If you forget to tie the non-inverting pin to ground, stray electromagnetic interference and input bias currents will charge the pin's parasitic capacitance. The output will drift slowly and unpredictably until it hits a supply rail.
Step-by-Step Breadboard Testing Procedure
Do not just plug in the IC and apply power. Analog circuits require a methodical bring-up sequence to prevent latching up the silicon or chasing phantom bugs. Follow these steps to verify your op amp inverting amplifier circuit diagram in the physical world.
- Install Power Decoupling First: Place the TL072 on the breadboard. Run jumper wires for VCC (+12V) and VEE (-12V). Immediately place 100nF ceramic capacitors between VCC and GND, and VEE and GND. Why? Op amps act as high-frequency oscillators without local decoupling due to power rail inductance.
- Wire the Feedback and Ground: Install Rf from the output pin to the inverting input. Tie the non-inverting input directly to the ground rail. Do not apply power yet.
- Continuity Check (Dead Test): Use your multimeter in continuity mode. Verify that the non-inverting pin reads 0Ω to ground. Verify that you do not have a short between VCC and VEE. Verify that the power pins on the DIP match the breadboard rails (Pin 4 is VEE, Pin 8 is VCC on a TL072—a classic trap for beginners).
- Quiescent Power-Up: Turn on your bench power supply. With no input signal applied (Vin tied to ground through Rin), measure the output pin with your DMM. It should read between -10mV and +10mV. If it reads ±11V, you have an open feedback loop or a floating non-inverting pin.
- Inject and Measure: Apply a known DC voltage to Vin. If you apply +0.5V DC, your meter should read -5.0V at Vout. If the reading is inverted (e.g., +5.0V), you have accidentally wired a non-inverting topology or swapped your inverting/non-inverting pins.
- AC Signal Verification: Switch to an AC signal source (like a function generator at 1kHz, 200mV peak-to-peak) and measure the output with an oscilloscope. Verify that the output waveform is exactly 10x larger and flipped 180 degrees out of phase with the input trigger.
For a deeper mathematical treatment of op amp errors, including slew rate limiting and common-mode rejection limits in practical circuits, refer to the Analog Devices MT-047 Tutorial. Mastering the physical layout of these fundamental topologies bridges the gap between textbook theory and reliable bench design.
