When you need to read a high-impedance sensor with a low-impedance microcontroller ADC, or drive a heavy capacitive load without destabilizing your signal source, the solution is an op amp as a buffer. Also known as a unity gain amplifier or voltage follower, this configuration provides a voltage gain of exactly 1 ($A_v = 1$). It does not amplify the voltage; instead, it amplifies current, providing massive impedance transformation. The input draws virtually zero current (high impedance), while the output can source or sink tens of milliamps (low impedance) to drive the load.

This guide skips the abstract semiconductor physics and goes straight to the bench: how to wire it, which specific part numbers to buy in 2026, how to bias it for single-supply microcontrollers, and how to test it when it inevitably misbehaves.

The Anatomy of a Buffer: Symbol, Pinout, and Operating Regions

The standard operational amplifier symbol features two inputs and one output. For a buffer, the signal is applied to the non-inverting input (+). The inverting input (-) is tied directly to the output pin, creating a 100% negative feedback loop. This forces the op-amp to adjust its output voltage until the voltage at the inverting input exactly matches the non-inverting input.

In a standard 8-pin DIP or SOIC dual op-amp package (like the LM358), the pinout is typically: Pin 1 (Out A), Pin 2 (In- A), Pin 3 (In+ A), Pin 4 (V- / GND), Pin 5 (In+ B), Pin 6 (In- B), Pin 7 (Out B), and Pin 8 (V+). Always verify with the specific datasheet, as pinouts vary between manufacturers.

An op-amp in a buffer configuration operates in one of three distinct regions, dictated by the input voltage and the power supply rails:

Op-Amp Buffer Operating Regions
Region Condition Output Voltage ($V_{out}$) Output Current Limit Internal State
Linear (Active) $V_{EE} + V_{drop} < V_{in} < V_{CC} - V_{drop}$ $V_{out} = V_{in}$ (within mV) Typically < 20mA to 40mA Both input transistors conducting; feedback loop is closed and stable.
Positive Saturation $V_{in} \ge V_{CC} - V_{drop}$ $V_{CC} - V_{sat}$ (e.g., 5V rail yields ~3.5V or 4.9V for R2R) Short-circuit limit (e.g., 40mA) Output PNP/NMOS fully on; feedback loop broken; phase margin lost.
Negative Saturation $V_{in} \le V_{EE} + V_{drop}$ $V_{EE} + V_{sat}$ (e.g., GND rail yields ~0.02V to 1.5V) Short-circuit limit (e.g., 40mA) Output NPN/PMOS fully on; feedback loop broken; recovery delay possible.

Selecting the Right Part: Safe Defaults and Spec Sheet Breakdown

Not all op-amps can be wired as stable unity-gain buffers. Some require a minimum gain of 5 or 10 to maintain phase margin and prevent high-frequency oscillation. When selecting an IC, you must look for the 'Unity Gain Stable' specification in the datasheet. Below are the safe, default part numbers for modern DIY and prototyping workbenches, priced for 2026 component markets.

Unity-Gain Stable Op-Amp Comparison for Buffer Applications
Part Number Supply Range Input Bias Current Slew Rate Output Type Typ. Price (1pc) Best Application
LM358 (TI/ON Semi) 3V to 32V (Single) or ±1.5V to ±16V 20 nA (typ) 0.3 V/μs Single Supply (to GND) $0.15 Low-cost, low-speed DC sensors, single-supply 5V/12V systems.
TL072 (TI) ±5V to ±18V (Dual only) 5 pA (typ) 13 V/μs Standard (needs dual rail) $0.45 Audio buffers, dual-rail bench equipment, high-impedance piezo sensors.
MCP6001 (Microchip) 1.8V to 6.0V 1 pA (typ) 0.6 V/μs Rail-to-Rail I/O $0.35 3.3V microcontrollers (ESP32/Pi Pico), battery-powered IoT nodes.
OPA340 (TI) 2.1V to 5.5V 0.2 pA (typ) 6 V/μs Rail-to-Rail I/O $1.85 Precision 3.3V/5V ADC buffering, low-offset medical/strain gauge sensors.
Bench Tip: If you are buffering a signal for an ESP32 or Raspberry Pi Pico ADC, do not use the LM358. The LM358 cannot swing its output all the way to the positive rail (it loses about 1.5V). On a 3.3V supply, the LM358 output will clip at ~1.8V. Always choose a Rail-to-Rail Output (RRO) part like the MCP6001 or OPA340 for 3.3V systems.

Designing the Unity Gain Circuit: Biasing and Component Values

The most common use case for an op amp as a buffer on the modern workbench is solving the ESP32 ADC impedance problem. The ESP32's internal ADC sampling capacitor (roughly 10pF to 12pF) must charge fully during the sample-and-hold window. If your source impedance (like a 100kΩ/100kΩ thermistor voltage divider) is higher than 10kΩ, the capacitor won't charge in time, resulting in non-linear, wildly inaccurate readings. A buffer drops the source impedance to under 1Ω.

Here is a complete, bench-tested application circuit for buffering a high-impedance 3.3V sensor into an ESP32 ADC.

Component List and Values

  • U1: MCP6001 (Single, 3.3V compatible, Rail-to-Rail)
  • R1 (Input Filter): 100Ω (Limits inrush current into input protection diodes)
  • C1 (Input Filter): 100nF (X7R ceramic, placed physically close to Pin 3)
  • R2 (Feedback): 0Ω (Direct jumper wire from Pin 1 to Pin 2)
  • R3 (Output Isolation): 33Ω (Critical for stability; isolates the op-amp from the ESP32's capacitive ADC load)
  • C2 (Decoupling): 100nF (Across VCC and GND pins of the IC)

Wiring Steps

  1. Power the IC: Connect Pin 5 (VDD) to the ESP32's 3.3V rail. Connect Pin 2 (VSS) to system Ground. Place C2 (100nF) directly across these pins.
  2. Condition the Input: Route your high-impedance sensor signal through R1 (100Ω) to Pin 3 (Non-inverting input). Connect C1 (100nF) from Pin 3 to Ground. This forms a low-pass filter ($f_c \approx 16kHz$) to reject high-frequency EMI before it hits the op-amp.
  3. Close the Loop: Solder a direct wire from Pin 1 (Output) to Pin 4 (Inverting input). This sets the gain to exactly 1.
  4. Isolate the Output: Connect R3 (33Ω) between Pin 1 and the ESP32 ADC GPIO pin. Do not skip this resistor. Driving a purely capacitive load (like an ADC sampling gate) directly from an op-amp output introduces a pole in the feedback loop, destroying phase margin and causing high-frequency ringing or oscillation.
Biasing for AC Signals: The circuit above assumes a DC signal referenced to ground. If you are buffering an AC audio signal on a single 3.3V supply, you must bias the non-inverting input to $V_{CC}/2$ (1.65V) using a resistive divider, and AC-couple the input signal through a series capacitor. The Analog Devices MT-041 Tutorial provides excellent schematics for single-supply AC biasing.

Failure Modes and Bench Testing with a Multimeter

Op-amps rarely fail gracefully. When an op amp buffer fails, it usually locks to one of the supply rails, oscillates at RF frequencies (which your multimeter will read as a random DC average), or suffers internal latch-up due to overvoltage. Here is how to systematically test a suspected faulty buffer circuit using a standard digital multimeter (DMM).

Step-by-Step DMM Diagnostic Path

  1. Verify Supply Voltage (Power On): Set DMM to DC Volts. Probe Pin 5 (VCC) and Pin 2 (GND). You must read exactly 3.30V (±0.05V). If it reads 1.5V or is fluctuating, the op-amp is likely drawing excessive current due to an internal short or output overload. Power down immediately.
  2. Check for Output Shorts (Power Off): Set DMM to Continuity/Diode mode. Probe the output trace (after R3) to Ground, and Output to VCC. You should read 'OL' (open). If you read a dead short (< 5Ω), the output transistor has blown, or your load is shorted.
  3. The 'Golden Rule' Test (Power On, Linear Region): Set DMM to DC mV range. Apply a known 1.500V DC signal to the input. Probe Pin 3 (Non-inverting) and Pin 4 (Inverting). In a functioning buffer, the voltage difference between these two pins (the differential input voltage) must be less than 5mV. If you read 500mV or more between the input pins, the internal differential pair is destroyed or the op-amp is saturated.
  4. Verify Output Tracking: Probe the final output node (after the 33Ω isolation resistor). It should read exactly 1.500V (±10mV for precision parts, ±50mV for LM358). If the input is 1.5V but the output is stuck at 3.3V or 0V, the output stage is blown or the feedback trace (Pin 1 to Pin 4) is broken.
  5. Test for Hidden Oscillation: If the DC voltage reads correctly but the circuit behaves erratically (e.g., ADC readings are noisy), switch your DMM to AC Volts. Probe the output. A stable DC buffer should read 0.000V AC. If you read 50mV to 500mV AC, the op-amp is oscillating at high frequency due to capacitive loading or poor PCB layout. Increase the value of the output isolation resistor (R3) from 33Ω to 100Ω to restore phase margin.
ESD and Latch-Up Warning: CMOS op-amps like the MCP6001 and OPA340 are highly susceptible to latch-up if the input voltage exceeds the VCC rail by more than 0.3V. If you are buffering a sensor that might spike to 5V while the op-amp is powered at 3.3V, you must add Schottky clamping diodes (like the BAT54S) from the input pin to VCC and GND. Standard PN diodes (1N4148) have a forward voltage of ~0.6V, which is too slow and too high to prevent CMOS latch-up.

For deeper reading on buffer stability and input protection, refer to the Texas Instruments LM358 Datasheet for classic bipolar behavior, and the All About Circuits voltage follower guide for foundational impedance theory.