An N-channel FET (Field Effect Transistor) is a voltage-controlled semiconductor switch where a positive voltage applied to the Gate terminal allows current to flow from the Drain to the Source. Unlike bipolar junction transistors (BJTs) that require continuous base current, a FET draws virtually zero steady-state gate current, making it the undisputed king of modern power switching and microcontroller interfacing.

If you need a quick starting point for your next build, here are the three safe default N-channel FET transistors you should keep in your bench stock:

  • 2N7000 (TO-92): 60V Vds, 200mA Id. Best for low-power signal switching and level shifting. Not suitable for motors.
  • IRLZ44N (TO-220): 55V Vds, 47A Id, Logic-Level (Rds(on) rated at 5V Vgs). The ultimate default for 3.3V/5V MCU power switching.
  • IRF520 (TO-220): 100V Vds, 9A Id, Standard-Level (Requires 10V Vgs to fully turn on). Use only with 12V gate drivers or op-amp circuits, never directly from an Arduino.

Symbol, Pinout, and Internal Architecture

On a schematic, the N-channel enhancement MOSFET symbol features three terminals: Gate (G), Drain (D), and Source (S). The Source pin is identified by an arrow pointing inward toward the channel. Crucially, the symbol also includes a dashed or solid line representing the parasitic body diode pointing from the Source to the Drain. This diode is an unavoidable byproduct of the silicon manufacturing process. It means an N-channel FET will always conduct current backwards (Source to Drain) if the Drain voltage drops below the Source voltage, a trait you must account for in H-bridge and reverse-polarity circuits.

Physical pinouts vary by package. When holding the transistor with the flat face (with the text) pointing toward you and the pins pointing down:

  • TO-220 (e.g., IRLZ44N): Left = Gate, Center = Drain, Right = Source. (Note: The metal tab on the back is internally connected to the Drain).
  • TO-92 (e.g., 2N7000): Left = Source, Center = Gate, Right = Drain.
Warning: The metal mounting tab on a TO-220 package is tied to the Drain pin. If you mount it to a grounded chassis heatsink without a silicone insulator pad, you will short your load directly to ground the moment you bolt it down.

Operation Regions and Biasing for the Job

Beginners often confuse FET terminology with BJT terminology. In a BJT, 'saturation' means the switch is fully ON. In an N-channel FET transistor, the 'saturation' region actually means the device is acting as a constant-current source (partially on). To use a FET as a fully closed switch, you must bias it into the Linear (Ohmic) region.

Operation Region Bias Condition Typical Vds & Ids Practical Application
Cutoff Vgs < Vgs(th) Vds = Supply, Ids = 0A Switch OFF. Load is disconnected.
Linear (Ohmic) Vgs > Vgs(th) AND Vds < (Vgs - Vth) Vds ≈ 0.1V, Ids = Max Load Switch ON. Acts as a low-value resistor (Rds(on)).
Saturation (Active) Vgs > Vgs(th) AND Vds > (Vgs - Vth) Vds > 2V, Ids = Constant Constant current sinks, linear amplifiers, active loads.

How to Select and Bias the Right FET

To bias an N-channel FET transistor as a switch, your primary focus is the Gate-to-Source threshold voltage (Vgs(th)) and the On-Resistance (Rds(on)). Datasheets list Vgs(th) as a range (e.g., 1.0V to 2.0V). This is the voltage where the FET begins to conduct (usually at a mere 250µA). It is not the voltage required to turn it fully on.

Look at the Rds(on) specification table in the datasheet. If you are driving the gate from a 3.3V ESP32, you must find a FET that specifies its Rds(on) at Vgs = 4.5V or lower (known as 'Logic-Level'). If the datasheet only lists Rds(on) at Vgs = 10V (like the IRF520), a 3.3V GPIO will leave the FET in the linear/saturation boundary, causing it to act as a heater rather than a switch, potentially destroying the silicon.

The Go-To Application Circuit: 3.3V MCU Switching a 12V Motor

Here is a complete, bench-tested circuit for switching a 12V DC motor (drawing up to 5A) using a 3.3V microcontroller GPIO and an IRLZ44N logic-level N-channel FET transistor.

Component List and Values

  • Q1: IRLZ44N N-Channel Logic-Level MOSFET
  • R1 (Gate Resistor): 100Ω (1/4W)
  • R2 (Pull-down Resistor): 10kΩ (1/4W)
  • D1 (Flyback Diode): 1N4007 or Schottky equivalent (e.g., 1N5819)

Wiring Steps

  1. Connect the microcontroller 3.3V GPIO pin to one end of the 100Ω gate resistor (R1). Connect the other end of R1 to the Gate (G) pin of the FET. Why 100Ω? A FET gate acts like a tiny capacitor. When the GPIO goes HIGH, it dumps current to charge this capacitor. 3.3V / 100Ω = 33mA peak, keeping you safely under the ESP32's 40mA absolute maximum GPIO limit.
  2. Connect the 10kΩ pull-down resistor (R2) between the Gate (G) and Source (S) pins. This ensures the gate discharges and the motor stays off if the MCU resets, floats, or loses power during boot-up.
  3. Connect the Source (S) pin directly to the system Ground (GND).
  4. Connect the Drain (D) pin to the negative terminal of the 12V DC motor.
  5. Connect the positive terminal of the 12V DC motor to your 12V power supply positive rail.
  6. Connect the 1N4007 flyback diode (D1) in reverse bias across the motor terminals: the cathode (striped end) to the motor positive, and the anode to the motor negative (Drain pin). This clamps the inductive voltage spike when the FET turns off, preventing avalanche breakdown of the silicon.
Pro-Tip: If you are switching high currents (>10A) or using high-frequency PWM (>5kHz), the 100Ω resistor will charge the gate too slowly, causing the FET to linger in the high-dissipation active region. Swap the MCU and resistor for a dedicated gate driver IC like the TC4427 or a simple BJT totem-pole driver to push amps of peak current into the gate.

Failure Modes and How to Test with a Multimeter

N-channel FETs typically fail in three ways: Gate oxide puncture from ESD or exceeding the ±20V Vgs(max) limit (results in a dead short between Gate and Source), thermal runaway from inadequate heatsinking or insufficient Vgs drive (results in a melted package or shorted Drain-Source), and avalanche breakdown from inductive spikes exceeding the Vds rating without a flyback diode.

You can diagnose a suspected dead FET on the bench using a standard digital multimeter (DMM). Set your DMM to the Diode Test mode.

Step-by-Step Multimeter Testing

  1. Discharge the Gate: Touch your finger across the Gate and Source pins, or use a jumper wire to short G to S. This bleeds off any trapped gate charge.
  2. Test the Body Diode (Forward): Place the Red probe on the Source and the Black probe on the Drain. The meter should read the forward voltage drop of the internal body diode, typically between 0.400V and 0.600V.
  3. Test the Body Diode (Reverse): Swap the probes (Red on Drain, Black on Source). The meter should read 'OL' (Open Loop), confirming the diode blocks reverse current.
  4. Charge the Gate: With the Black probe still on the Source, briefly touch the Red probe to the Gate pin. This applies the DMM's internal ~3V test voltage to the gate, charging the internal capacitance and turning the FET ON.
  5. Test the Channel (ON State): Move the Red probe back to the Drain (Black remains on Source). The meter should now read a very low voltage drop (close to 0.000V to 0.050V) or beep in continuity mode, indicating the channel is fully enhanced and conducting.
  6. Discharge and Verify OFF: Short the Gate to Source again. Repeat Step 2. It should revert to the 0.4V - 0.6V diode drop. If it stays at 0V, the Drain-Source channel is permanently shorted (blown FET).

N-Channel FET Transistor FAQ

Can I use an N-channel FET transistor for high-side switching?

Technically yes, but practically no. To turn on an N-channel FET, the Gate voltage must be higher than the Source voltage by at least Vgs(th). In a high-side configuration, as the FET turns on, the Source voltage rises toward the supply rail. To keep it fully enhanced, you would need a Gate voltage higher than your main supply rail (requiring a charge pump or bootstrap circuit). For high-side switching, always default to a P-channel MOSFET or a dedicated high-side load switch IC.

What is the difference between an N-channel FET transistor and an NPN BJT?

An NPN BJT is a current-controlled device; you must continuously supply base current (usually 1/10th to 1/20th of the collector current) to keep it saturated. An N-channel FET is voltage-controlled; it requires a brief spike of current to charge the gate capacitance, but draws virtually zero continuous current to stay ON. Furthermore, a saturated BJT has a fixed voltage drop (Vce(sat), typically 0.2V to 0.7V), while a FET acts as a resistor (Rds(on)). At high currents, a FET's I²R power loss is vastly lower than a BJT's fixed Vce drop.

Why does my N-channel FET transistor get hot when switching PWM?

If your FET is cool at DC but burns up under PWM, you are hitting the Miller Plateau. During switching, the gate capacitance must be charged and discharged. If your gate resistor is too high or your MCU GPIO is too weak, the voltage transition from OFF to ON takes too long. The FET spends a massive percentage of the PWM cycle lingering in the active (saturation) region where both Vds and Ids are high, resulting in massive instantaneous power dissipation. Lower the gate resistor value, or use a dedicated push-pull gate driver to snap the gate voltage between 0V and Vcc in nanoseconds.