Logic Gates with Truth Table: Reference Chart & IC Selection Guide

The seven fundamental logic gates—AND, OR, NOT, NAND, NOR, XOR, and XNOR—are the atomic building blocks of every digital system, from simple 555-timer latch circuits to 64-bit microprocessors. While the abstract Boolean math is universal, the physical silicon you buy behaves very differently depending on your voltage rails and capacitive loads. Below is the master reference chart for logic gates with truth table data, followed by a concrete decision matrix to help you select the exact IC family for your workbench.

The Master Logic Gate Reference Chart

How to read this table: This chart maps the standard IEEE Std 91/91A and IEC 60617 symbolic representations to their Boolean algebraic expressions and 2-input truth tables. The 'A' and 'B' columns represent digital inputs (0 = Low/GND, 1 = High/VCC), and 'Y' represents the output. For single-input gates (NOT), the 'B' column is ignored. Use this as a quick-jump bookmark when debugging combinatorial logic on an oscilloscope.

Logic Family Decision Matrix: Which Column Applies to You?

A truth table defines ideal logical behavior, but physical ICs are bound by voltage thresholds. The most common mistake hobbyists make is mixing 5V TTL (like the obsolete 74LS series) with 3.3V microcontrollers like the ESP32 or Raspberry Pi Pico. To determine which logic family column applies to your installation, use the decision tree below.

Beyond the Chart: Fan-Out and Propagation Delay Derating

The truth table assumes instantaneous switching. In reality, every gate has a propagation delay ($t_{pd}$), and this value derates heavily based on capacitive loading ($C_L$). When you look at a manufacturer datasheet—such as the Texas Instruments Logic Selection Guide—you will see $t_{pd}$ specified at a baseline $C_L$ of 15pF.

How derating modifies the base value: Every logic input you connect to an output adds roughly 5pF to 10pF of parasitic capacitance, plus the trace capacitance on your PCB or breadboard. If a 74HC00 NAND gate has a baseline $t_{pd}$ of 10ns at 15pF, driving five additional gates (adding ~40pF) will push the total load to 55pF. At 50pF, the $t_{pd}$ derates to approximately 22ns. In high-speed clock circuits (e.g., >10MHz), this 12ns skew can cause downstream flip-flops to violate setup times, resulting in erratic behavior that a multimeter will never catch. You must use an oscilloscope to verify timing margins under actual fan-out loads.

What the Truth Table Cannot Tell You

A standard logic gate truth table is a static DC abstraction. It completely hides three critical real-world failure modes that destroy prototypes on the bench:

1. Floating Inputs and Shoot-Through Current: Unlike old bipolar TTL (74LS), which internally pulled floating inputs high, modern CMOS (74HC, 74LVC) has ultra-high impedance inputs. If you leave an input pin unconnected on a 74HC04 inverter, it will act as an antenna, picking up 60Hz mains hum. This causes the internal MOSFETs to switch on and off simultaneously at MHz frequencies, creating a 'shoot-through' short circuit that will overheat and melt the silicon. Always tie unused CMOS inputs to VCC or GND via a 10kΩ resistor.
2. Analog Thresholds and Hysteresis: The truth table shows a hard flip from 0 to 1. But a standard 74HC14 (Hex Schmitt-Trigger Inverter) has different thresholds for rising edges ($V_{T+}$) and falling edges ($V_{T-}$). If you are debouncing a mechanical switch or squaring up a noisy sine wave, a standard 74HC04 will output a chaotic burst of pulses at the threshold crossing. You must select the Schmitt-trigger variant (74HC14) to leverage hysteresis.
3. Metastability in Sequential Logic: When combining gates into latches or flip-flops, the truth table ignores setup and hold times. If the data input changes within picoseconds of the clock edge, the output can enter a metastable state—hovering at $V_{CC}/2$—before randomly resolving to a 1 or 0. This is why synchronous design rules mandate strict timing margins.

Concrete Default Picks for the Workbench

Stop buying obsolete 74LS TTL chips from surplus bins; they draw excessive current and lack the voltage flexibility required for modern embedded projects. Based on current NXP and TI standard logic portfolios, here are the exact part numbers you should stock in your component drawers for 95% of DIY and prototyping tasks:

• The 5V Workhorse: SN74HC00N (Quad NAND). NAND is a universal gate; you can build AND, OR, and NOT functions entirely from NAND gates. Stocking just this one DIP-14 IC covers all basic combinatorial needs for 5V Arduino and 555-timer circuits.
• The 3.3V Microcontroller Companion: SN74LVC08APWR (Quad AND, TSSOP package). Essential for masking interrupts and combining active-low chip-select lines on ESP32 and Raspberry Pi SPI buses without frying the GPIO pins.
• The Signal Conditioner: SN74HC14N (Hex Schmitt-Trigger Inverter). The absolute best IC for converting messy analog sensor outputs or mechanical switch bounces into clean, sharp digital square waves.
• The High-Voltage Fallback: CD4011BE (Quad NAND, 4000-series). Keep a few of these for 9V or 12V automotive or audio synth projects where 5V logic simply cannot interface directly with the higher voltage rails.

For deeper theoretical analysis and interactive simulations of these gates, the All About Circuits Digital Textbook remains the definitive open-reference for bridging the gap between Boolean math and physical silicon behavior.