Leakage Inductance in Transformer Circuits and Flyback Snubber Design

Leakage inductance in transformer windings is the parasitic inductance caused by magnetic flux that fails to couple between the primary and secondary coils, acting as a series inductor that stores energy without transferring it to the load. In a real switching circuit, this uncoupled energy changes the voltage stress on your semiconductors, creates high-frequency EMI ringing, and robs the system of efficiency by trapping energy that must be dissipated as heat. Beginners frequently confuse leakage inductance with magnetizing inductance; while magnetizing inductance is the intentional energy storage mechanism that transfers power across the isolation barrier, leakage inductance is an unavoidable parasitic defect of physical winding geometry.

The Physics of Uncoupled Flux and Core Geometries

No transformer achieves perfect 1:1 magnetic coupling. When current flows through the primary winding, it generates a magnetic field. Ideally, 100% of this flux travels through the high-permeability ferrite core and intersects the secondary winding. In reality, some flux lines escape into the surrounding air or insulation gaps between the wire layers. Because air has a much lower permeability than ferrite, this "leaked" flux does not link to the secondary coil. Instead, it behaves exactly like a discrete inductor wired in series with your primary winding.

The magnitude of this parasitic effect depends heavily on the physical geometry of the core and how the windings are layered. Cores with long, narrow center legs and significant spacing between primary and secondary bobbins exhibit higher leakage. Below is a reference table detailing typical leakage characteristics for common ferrite core shapes used in offline power supplies, assuming a standard 1:1 turns ratio with basic layer winding (no interleaving).

As noted in the TDK Electronics ferrite catalog, PQ and Planar cores minimize the physical distance between windings, drastically reducing the uncoupled flux path. Toroids, while excellent for containing external EMI, force the primary and secondary to be wound side-by-side along the circumference, resulting in terrible coupling coefficients for power transfer applications.

The Math: Calculating MOSFET Avalanche in Flyback Converters

To understand what this parasitic inductance actually does to your components, let us walk through a real-world failure mode. In a flyback converter, when the primary MOSFET turns off, the magnetizing inductance successfully transfers its energy to the secondary side through the output diode. However, the leakage inductance cannot transfer energy to the secondary because its flux never linked to it. That trapped energy must go somewhere, and it forcefully dumps into the MOSFET’s parasitic output capacitance ($C_{oss}$), causing a massive voltage spike.

Let us calculate the exact spike voltage using a practical bench scenario. Assume you are designing a 65W USB-C PD flyback adapter with the following parameters:

• Peak Primary Current ($I_{pk}$): 4.0 Amps
• Measured Leakage Inductance ($L_{leak}$): 8.0 µH (typical for an EE30 core)
• MOSFET Output Capacitance ($C_{oss}$): 150 pF (typical for a 650V Superjunction FET)

The energy trapped in the leakage inductance is calculated as:

E = 0.5 × L × I² = 0.5 × 8.0µH × (4.0A)² = 64 µJ

This 64 µJ transfers entirely into the $C_{oss}$ capacitor. We solve for the voltage spike ($V_{spike}$) using the capacitor energy formula ($E = 0.5 × C × V²$):

V_{spike} = √(2E / C) = √(128µJ / 150pF) = √(853,333) ≈ 923 Volts

This 923V spike is superimposed on top of your DC bus voltage (e.g., 375V from rectified 265VAC mains) and the reflected output voltage (e.g., 150V). Your total drain-source voltage ($V_{DS}$) hits 1,448V. If you selected a standard 650V or even an 800V MOSFET, it will instantly catastrophically fail on the first switching cycle. This is why an RCD (Resistor-Capacitor-Diode) snubber circuit is mandatory to clamp this spike before it reaches the silicon.

Where You Meet This in Practice

You will encounter and need to manage leakage inductance in three primary areas of power electronics design and troubleshooting:

1. RCD Snubber Component Selection

To safely dissipate the 64 µJ calculated above, you must design an RCD snubber. The diode in this circuit must be incredibly fast to catch the spike before the MOSFET avalanches. Never use a standard 1N4007 rectifier diode; its reverse recovery time ($t_{rr}$) is far too slow (typically >2µs), meaning the spike will pass right through it and kill your FET. You must use an ultra-fast recovery diode like the UF4007 (50ns $t_{rr}$) or a Silicon Carbide (SiC) Schottky diode for high-voltage designs. Furthermore, the snubber capacitor must be an X7R ceramic or film dielectric; Y5V ceramics lose up to 80% of their capacitance under DC bias, rendering your snubber useless at high voltages.

2. LLC Resonant Converter Topologies

While leakage is a nuisance in flyback designs, engineers intentionally exploit it in LLC resonant converters. In an LLC tank, you need a specific series resonant inductor ($L_r$). Instead of adding a discrete, costly physical inductor to the PCB, transformer designers will intentionally space the primary and secondary windings apart to increase the leakage inductance to the exact required value (often 50µH to 150µH). This technique, documented extensively in Texas Instruments power design resources, saves board space and reduces component count.

3. Physical Winding Techniques (Interleaving)

If your leakage is too high and your snubber is burning up, you must alter the physical transformer construction. The most effective method is sand winding (interleaving). Instead of winding all primary turns, then all secondary turns (P-S), you split the primary in half and sandwich the secondary between them (P-S-P). This forces the magnetic fields to overlap tightly, typically reducing leakage inductance by 70% to 85%. The trade-off is increased inter-winding capacitance, which can worsen common-mode EMI, requiring you to balance magnetic coupling against capacitive coupling.

FAQ: Measuring and Mitigating Leakage Issues

For a deeper theoretical foundation on non-ideal transformer behaviors, including winding resistance and core hysteresis, review the chapter on practical transformers in the All About Circuits textbook. Understanding these parasitics is the dividing line between a circuit that works in SPICE and one that survives on the bench.