If you need to amplify a high-impedance piezo pickup, design an electret microphone preamp, or build a low-noise RF front-end, standard bipolar junction transistors (BJTs) will often ruin your signal-to-noise ratio. The solution is usually one of the junction field effect transistors (JFETs). Unlike enhancement-mode MOSFETs that require a gate voltage to turn on, a JFET is a normally-ON (depletion-mode)
On a schematic, the N-channel JFET symbol features a vertical bar (the channel) with an arrow pointing inward on the gate lead. The three terminals are Drain (D), Source (S), and Gate (G). Because the gate forms a PN junction with the channel, the input impedance is exceptionally high (often >1 GΩ) when reverse-biased, drawing virtually zero steady-state gate current.
The Shortlist: Safe Default JFET Part Numbers & Ratings
Walking into a semiconductor distributor's catalog can be overwhelming, and many classic hobbyist JFETs (like the legendary MPF102) are now obsolete or marked as "not recommended for new designs." If you are stocking your lab bench or designing a new audio/RF board, these are the modern, readily available safe defaults you should use.
| Part Number | Primary Application | Max $V_{DS}$ | $I_{DSS}$ (Zero-Gate Bias Current) | $V_{GS(off)}$ (Pinch-Off Voltage) | Forward Transconductance ($g_{fs}$) |
|---|---|---|---|---|---|
| 2N5457 | Low-Noise Audio / General Purpose | 25V | 2.0 mA to 9.0 mA | -0.5V to -6.0V | 2000 µS (typ) |
| J310 | RF / VHF Amplifiers & Mixers | 25V | 24 mA to 60 mA | -1.0V to -4.0V | 8000 µS (typ) |
| 2N3819 | General RF / Switching | 20V | 2.0 mA to 20 mA | -0.5V to -7.5V | 2000 µS (typ) |
| J175 | Analog Switching (P-Channel) | 30V | -3.0 mA to -10 mA | +1.0V to +4.0V | 1500 µS (typ) |
Operation Regions and Real-World Biasing
To use a JFET effectively, you need to know which of its three operating regions you are targeting. For amplification, you want the Saturation (Active) region. For analog switching or voltage-controlled resistors, you want the Ohmic region.
| Region | Gate-Source Voltage ($V_{GS}$) | Drain-Source Voltage ($V_{DS}$) | Drain Current ($I_D$) | Practical Circuit Behavior |
|---|---|---|---|---|
| Cutoff | $V_{GS} \le V_{GS(off)}$ (e.g., $\le -3V$) | Any | 0 mA | Device is OFF. Acts as an open switch. |
| Ohmic (Linear) | $0V > V_{GS} > V_{GS(off)}$ | $V_{DS} < V_{GS} - V_{GS(off)}$ | Proportional to $V_{DS}$ | Acts as a voltage-controlled resistor. |
| Saturation (Active) | $0V > V_{GS} > V_{GS(off)}$ | $V_{DS} \ge V_{GS} - V_{GS(off)}$ | Constant (e.g., 2-5 mA) | Acts as a constant current source / amplifier. |
The Standard Self-Bias Common-Source Amplifier
The most reliable way to bias a JFET in the Saturation region is the self-bias configuration. Because the gate draws no DC current, we can tie it to ground via a high-value resistor, and let the voltage drop across a source resistor create the necessary negative $V_{GS}$ bias automatically.
Complete Application Circuit (Low-Noise Audio Preamp using 2N5457):
- VDD: 12V DC Supply
- R_G (Gate to GND): 1 MΩ (Sets input impedance, keeps gate at 0V DC)
- R_S (Source to GND): 1 kΩ (Sets the bias current)
- R_D (Drain to VDD): 4.7 kΩ (Develops the output voltage swing)
- C_IN (Input Coupling): 10 µF (Blocks DC from signal source)
- C_OUT (Output Coupling): 10 µF (Blocks DC from next stage)
- C_S (Source Bypass): 100 µF (Bypasses R_S for AC signals to maximize voltage gain)
Worked Bias Calculation:
Assume your specific 2N5457 has an $I_{DSS}$ that settles at $I_D = 2.5 mA$ in this circuit. The current flows through $R_S$, creating a voltage drop: $V_S = I_D \times R_S = 2.5 mA \times 1000 \Omega = 2.5V$. Because the gate is tied to ground through $R_G$ (0V), the Gate-to-Source voltage is $V_{GS} = V_G - V_S = 0V - 2.5V = -2.5V$. If your part's $V_{GS(off)}$ is -4.0V, a $V_{GS}$ of -2.5V places the JFET squarely in the middle of its active saturation region, allowing maximum symmetrical voltage swing at the drain.
Failure Modes and Definitive Multimeter Testing
JFETs are rugged, but they are not invincible. Understanding how they fail dictates how you test them. According to All About Circuits semiconductor theory, the gate-channel junction is just a standard PN diode.
Common Failure Modes:
- Gate Punch-Through: If you accidentally forward-bias the gate-channel junction (e.g., applying a positive voltage to the gate of an N-channel JFET exceeding ~0.6V), the gate diode conducts heavily. Without a current-limiting resistor, the junction melts, shorting the gate to the channel.
- ESD Damage: While JFETs are inherently more robust against electrostatic discharge than MOSFETs (because the gate is a physical diode rather than a floating, ultra-thin oxide layer), high-voltage static spikes can still rupture the gate junction, resulting in a dead short.
- Thermal Runaway: Unlike BJTs, JFETs have a negative temperature coefficient at zero bias. As they get hot, $I_D$ naturally drops, making them inherently immune to the thermal runaway that plagues parallel BJT designs.
How to Test an N-Channel JFET with a Digital Multimeter
You do not need a specialized transistor tester to verify a JFET. A standard DMM with a Diode Test mode is sufficient. Note: This assumes an N-Channel JFET. Reverse the probe polarities for P-Channel.
- Test the Gate Diode (Junction Check): Set your DMM to Diode Test mode. Place the Red probe on the Gate and the Black probe on the Source. You should read a standard silicon diode forward voltage drop (typically 0.55V to 0.70V). Reverse the probes (Black on Gate, Red on Source). The meter must read OL (Over Limit). If it reads 0.00V or a low number in both directions, the gate is shorted and the part is dead.
- Repeat for Gate-Drain: Red on Gate, Black on Drain should read ~0.6V. Reverse should read OL.
- Test the Channel (Normally-ON Check): Switch your DMM to Resistance (Ohms) mode. Leave the Gate floating or touch the Gate and Source together with your finger (forcing $V_{GS} = 0V$). Measure across Drain and Source. You should read a relatively low resistance, typically between 100Ω and 1000Ω depending on the specific $I_{DSS}$ rating of the part.
- Test Pinch-Off (Optional but thorough): While measuring Drain-Source resistance, use a jumper wire and a 9V battery to briefly apply a negative voltage to the Gate relative to the Source (Battery Negative to Gate, Battery Positive to Source). The DMM resistance reading should immediately spike to OL as the channel pinches off. Remove the battery, and the resistance should drop back down.
JFET vs. MOSFET vs. BJT: When to Actually Specify a JFET
With modern CMOS processes dominating the market, why use a discrete three-legged JFET in 2026? The answer lies in the analog domain's demand for ultra-low noise and simple biasing. For a deeper look at discrete FET characteristics, the Electronics Tutorials JFET guide provides excellent baseline comparisons.
| Criteria | JFET (e.g., 2N5457) | MOSFET (e.g., 2N7000) | BJT (e.g., 2N3904) |
|---|---|---|---|
| Input Impedance | Extremely High (>1 GΩ) | Extremely High (>1 GΩ) | Low to Medium (1k - 50kΩ) |
| Low-Frequency (1/f) Noise | Extremely Low (Ideal for audio) | High (Poor for audio preamps) | Moderate |
| Biasing Complexity | Simple (Self-bias works well) | Moderate (Requires $V_{GS(th)}$ tuning) | Moderate (Requires voltage divider) |
| Default State | Normally ON (Depletion) | Normally OFF (Enhancement) | Normally OFF |
| Best Use Case | Mic preamps, piezo buffers, RF front-ends | Logic level shifting, power switching | General amplification, digital switching |
The Final Verdict: Choose a JFET when your source signal has a massive output impedance (like a piezo disc or a passive guitar pickup) and you cannot afford the current draw or noise floor of a BJT base. Choose a MOSFET when you need to switch heavy loads or interface directly with 3.3V/5V microcontroller GPIO pins. Choose a BJT when you need high transconductance for pennies and are dealing with low-impedance sources where the base current draw won't load down the signal.
