An integrating op amp produces an output voltage proportional to the time-integral of its input signal, governed by the core equation V_out = -(1/RC) * ∫ V_in dt. Unlike standard amplifiers that scale voltage instantaneously, an integrator accumulates charge on a feedback capacitor, making it the foundational block for analog computing, PID controllers, and dual-slope analog-to-digital converters.
If you need a safe default part number for general-purpose DC and low-frequency integration, use the OP07 (single, precision) or the LMC662 (dual, ultra-low bias current). For audio or fast pulse integration where slew rate matters more than DC drift, the TL072 remains the workbench standard. The most critical rule when building these circuits is that a "pure" integrator will inevitably saturate in the real world; you must use a practical integrator topology with a parallel feedback resistor to limit DC gain and prevent rail lock-up.
Selecting the Right Op-Amp for Integration
When selecting an op-amp for an integrator, the parameters that matter in standard amplifiers (like high open-loop gain) take a backseat to input bias current (I_B) and input offset voltage (V_OS). Because the feedback capacitor continuously integrates any DC error present at the input, even a few nanoamps of bias current will charge the capacitor over time, ramping the output to the supply rail.
For long integration times (seconds to minutes), you must use CMOS or JFET-input op-amps with picoamp-level bias currents. Bipolar op-amps like the classic LM741 are practically useless for precision integration without constant reset cycles due to their high bias currents.
| Part Number | Input Bias Current (I_B) | Input Offset Voltage (V_OS) | Slew Rate | Best Application | Typical Price (2026) |
|---|---|---|---|---|---|
| LMC662 (Dual CMOS) | 0.002 pA (Typ) | 3 mV (Max) | 1.1 V/µs | Long-duration DC integration, sample-and-hold | $2.10 |
| OP07 (Single Bipolar) | 1.2 nA (Typ) | 75 µV (Max) | 0.3 V/µs | Short-duration precision analog computing | $1.45 |
| TL072 (Dual JFET) | 50 pA (Typ) | 10 mV (Max) | 13 V/µs | Audio integrators, fast pulse shaping, PID | $0.85 |
| OPA211 (Dual Bipolar) | 60 nA (Typ) | 125 µV (Max) | 2.7 V/µs | Low-noise sensor signal integration | $6.50 |
Pinout, Symbol, and the Practical Integrator Circuit
The standard 8-pin DIP op-amp pinout applies to most dual and single packages mentioned above. For a dual package like the TL072 or LMC662, the pinout is: Pin 1 (Out A), Pin 2 (IN- A), Pin 3 (IN+ A), Pin 4 (V- / GND), Pin 5 (IN+ B), Pin 6 (IN- B), Pin 7 (Out B), Pin 8 (V+). Always verify against the specific datasheet, as single op-amps (like the OP07) use Pins 1 and 5 for Offset Null adjustments.
In schematic symbols, the integrator is drawn as a standard op-amp triangle with the input resistor (R_in) feeding the inverting input, and the feedback capacitor (C_f) bridging the inverting input and the output. The non-inverting input is tied to ground (or a reference voltage).
A textbook "pure" integrator has no DC feedback path. At DC, the capacitor acts as an open circuit, giving the op-amp infinite open-loop gain. Any microscopic input offset voltage or bias current will be integrated, causing the output to ramp until it hits the supply rail (saturation). Once saturated, the op-amp's internal transistors require significant recovery time. Always build a practical integrator.
Complete Practical Integrator Circuit
To stabilize the circuit, we add a large feedback resistor (R_f) in parallel with the capacitor. This limits the DC gain to -R_f / R_in while maintaining integration behavior at higher frequencies. We also add a reset switch to discharge the capacitor before a measurement cycle.
- Op-Amp: LMC662 (Pin 8 to +12V, Pin 4 to -12V)
- Input Resistor (R_in): 10 kΩ (1% metal film)
- Feedback Capacitor (C_f): 100 nF (Polypropylene or C0G/NP0 ceramic)
- Feedback Resistor (R_f): 1 MΩ (Limits DC gain to -100)
- Reset Switch: CMOS analog switch (e.g., CD4066) across C_f, triggered by a microcontroller GPIO
- Time Constant (τ): R_in * C_f = 10,000 * 100e-9 = 1 ms
- Integration Frequency Range: Integrates signals above ~1.6 Hz (where X_c < R_f)
Operation Regions and Real-World Limits
An integrator does not behave linearly under all conditions. Understanding the operation regions is critical for debugging a circuit that "works in SPICE but fails on the bench." Assuming a standard ±15V power supply (yielding a typical ±13V output swing):
| Operation Region | Typical Voltages / Currents | Circuit Behavior | Symptom / Scope Trace |
|---|---|---|---|
| Linear Integration | V_out < ±13V I_out < 20mA |
Capacitor charges linearly; output accurately reflects the mathematical integral of the input. | Clean, straight ramp on oscilloscope for a DC step input. |
| Slew-Rate Limited | dV/dt > Slew Rate (e.g., > 13V/µs for TL072) |
The input step is too fast for the internal compensation capacitor to charge. Output ramps at a fixed maximum speed. | Ramp angle becomes fixed and shallower than calculated; introduces timing errors. |
| Output Saturation | V_out = ±V_sat (e.g., ±13.5V) |
Op-amp output transistors are fully on. The feedback loop is broken. The capacitor continues to charge via R_in but V_out cannot increase. | Flatline at the supply rail. Requires reset or power cycle to recover due to internal saturation delay. |
| Common-Mode Violation | V_in > V_CM range (e.g., > ±12V) |
Input differential pair cuts off. In many older op-amps, this causes phase reversal (output flips polarity). | Output violently snaps to the opposite supply rail instead of integrating. |
How Integrators Fail and Multimeter Diagnostics
Integrators rarely fail due to catastrophic silicon burnout unless you exceed the absolute maximum supply voltage or short the output to a low-impedance source. Instead, they fail functionally. The most common bench failure is dielectric absorption in the feedback capacitor, which causes the output voltage to "rebound" after a reset, ruining precision measurements. Another common issue is PCB surface leakage, where flux residue creates a high-impedance path that injects stray currents into the high-impedance inverting node.
Testing an Op-Amp Integrator with a DMM
If your integrator is stuck at the rail or refusing to hold a charge, follow this diagnostic sequence using a standard digital multimeter (DMM).
- De-energize and Discharge: Remove power from the circuit. Short the feedback capacitor with a 1kΩ resistor to safely discharge it. (Never short a large film capacitor directly with a screwdriver; the current spike can damage the capacitor's internal metallization).
- Check for Output Shorts: Set the DMM to resistance mode. Measure between the op-amp output pin (Pin 7 or 1) and ground. You should read the resistance of R_f in parallel with your load. If it reads near 0Ω, the op-amp output stage is shorted or a downstream component has failed.
- Diode Test the Inputs: Set the DMM to diode test mode. Measure from the inverting input (Pin 2 or 6) to V+ and V-. You should read a forward voltage drop (typically 0.6V for bipolar, higher for JFET/CMOS). A reading of 0.00V indicates blown input protection diodes, usually caused by ESD or overvoltage on the input.
- Verify the Virtual Ground: Power the circuit up. Set the DMM to DC millivolts. Measure between the non-inverting input (ground) and the inverting input. In a functioning linear integrator, this should read < 5mV. If it reads hundreds of millivolts, the op-amp has lost its negative feedback loop (check for cold solder joints on R_in or C_f) or the output is saturated.
When integrating picoamp-level signals or using long time constants (R_in = 1MΩ, C_f = 1µF), PCB leakage becomes a massive error source. Route a copper "guard ring" around the inverting input node and the feedback components. Tie this guard ring to a low-impedance node at the exact same potential as the inverting input (usually the non-inverting ground pin). This eliminates the voltage gradient across the PCB surface, reducing leakage currents to near zero.
The Capacitor Trap: Why Your Choice of Dielectric Matters
The most frequent mistake hobbyists and junior engineers make when building an integrating op amp is grabbing a standard X7R or Y5V multilayer ceramic capacitor (MLCC) for the feedback loop because it is cheap and physically small. This will ruin your circuit's accuracy.
X7R ceramics exhibit severe voltage coefficient of capacitance (the capacitance drops by up to 50% as the voltage across it increases) and piezoelectric effects (mechanical vibration generates spurious voltages). Worse, they suffer from high dielectric absorption. If you integrate a signal, reset the capacitor to 0V, and open the switch, an X7R capacitor will slowly "leak" absorbed charge back into the circuit, causing the op-amp output to drift upward on its own. According to Analog Devices' technical notes on dielectric absorption, this memory effect can introduce errors of several percent in precision sample-and-hold and integrator circuits.
The Fix: Always use C0G/NP0 ceramics for values under 10nF. For larger values (10nF to 10µF), use Polypropylene (PP), Polystyrene, or Teflon (PTFE) film capacitors. They are physically larger and more expensive, but their dielectric absorption is virtually zero, and their capacitance remains stable regardless of the voltage across them.
Finally, avoid mechanical pushbuttons for the reset switch. The contact bounce and leakage current of a cheap tactile switch will inject noise into the integration node. Use a CMOS analog switch IC (like the CD4066 or MAX333) driven by a clean microcontroller GPIO, or a low-leakage JFET configured as a shunt switch, to ensure a clean, bounce-free reset cycle. For deeper theoretical frameworks on integrator stability and compensation, refer to the Analog Devices MT-079 Tutorial and the All About Circuits semiconductor textbook.
