When studying example op amp circuits for university exams or practical design reviews, the standard inverting amplifier is rarely the final boss. Professors and senior engineers love to test your grasp of nodal analysis by inserting a T-network into the feedback loop. This configuration achieves massive gain without requiring physically large, noise-prone resistors, but it completely breaks the simple 'gain equals negative Rf over Rin' shortcut.

In this walkthrough, we will dissect a classic T-network feedback problem. We will identify the governing theorems, expose the most common algebraic trap, solve the circuit step-by-step, and verify the result. For a deeper dive into ideal op-amp assumptions, the All About Circuits semiconductor textbook provides an excellent foundation on virtual shorts.

The Problem Statement

Exam Problem: T-Network Inverting Amplifier

An ideal op-amp (e.g., OPA2134) is configured in an inverting topology. The non-inverting input (+) is tied to ground. A DC input voltage Vin = 0.5V is applied through resistor R1 = 10 kΩ to the inverting input (-).

The feedback network is a T-configuration consisting of three resistors:

  • R2 = 10 kΩ connects the inverting input (-) to an intermediate junction (Node A).
  • R3 = 10 kΩ connects Node A to ground.
  • R4 = 100 kΩ connects Node A to the op-amp output (Vout).

Task: Calculate the exact output voltage Vout and determine the effective closed-loop voltage gain.

Method Selection and the Common Trap

Which theorem/method applies and why?
Because we are dealing with an ideal op-amp in a negative feedback configuration, we must apply the Virtual Short principle (V+ = V-) alongside Kirchhoff's Current Law (KCL) / Nodal Analysis. The virtual short dictates that the inverting node sits at 0V (virtual ground). From there, KCL is the only reliable method to resolve the current splitting at the T-network junction (Node A).

The trap in this problem:
Students frequently attempt to simplify the T-network using series-parallel equivalent resistance before writing equations. They look at R3 and R4 and incorrectly assume they are in parallel, or they try to convert the T-network into a Delta network unnecessarily. Another common trap is assuming the current through R2 simply flows entirely into R4. It does not. R3 shunts a portion of that current to ground, altering the voltage at Node A and fundamentally changing the gain equation. If you try to use the standard Av = -Rf/Rin formula by just adding R2 + R4, you will get the wrong answer.

Callout Tip: Never simplify a T-network in an op-amp feedback loop using basic series/parallel rules unless you are performing a formal Thevenin or Y-Δ transform. Stick to raw nodal analysis; it is faster and less prone to sign errors.

Step-by-Step Algebraic Solution

Let's solve this systematically using nodal analysis. We have two critical nodes to evaluate: the inverting input (V-) and the T-network junction (Node A, which we will call VA).

Step 1: Apply the Virtual Short
The non-inverting input is grounded, so V+ = 0V. Due to negative feedback and infinite open-loop gain, the op-amp drives its output to force V- = V+.
Therefore, V- = 0V.

Step 2: KCL at the Inverting Node (V-)
Assuming an ideal op-amp (infinite input impedance), no current enters the op-amp pins. The current from Vin must flow entirely through R2 toward Node A.
IR1 + IR2 = 0
[(Vin - V-) / R1] + [(VA - V-) / R2] = 0

Substitute known values (Vin = 0.5V, V- = 0V, R1 = 10k, R2 = 10k):
[(0.5 - 0) / 10,000] + [(VA - 0) / 10,000] = 0
0.5 / 10,000 = -VA / 10,000
Multiply both sides by 10,000:
0.5 = -VA
VA = -0.5V

Step 3: KCL at the T-Network Junction (Node A)
At Node A, current flows in from R2, and flows out through R3 (to ground) and R4 (to Vout). The sum of currents leaving the node is zero:
[(VA - V-) / R2] + [(VA - 0) / R3] + [(VA - Vout) / R4] = 0

Substitute known values (V- = 0V, VA = -0.5V, R2 = 10k, R3 = 10k, R4 = 100k):
[(-0.5 - 0) / 10,000] + [(-0.5 - 0) / 10,000] + [(-0.5 - Vout) / 100,000] = 0

To clear the denominators, multiply the entire equation by 100,000:
10(-0.5) + 10(-0.5) + 1(-0.5 - Vout) = 0
-5 - 5 - 0.5 - Vout = 0
-10.5 - Vout = 0
Vout = -10.5V

Step 4: Calculate Closed-Loop Gain
Av = Vout / Vin = -10.5V / 0.5V = -21 V/V.

Sanity Check and Independent Verification

Answer Sanity Check (Order of Magnitude and Units):
The output is -10.5V. Does this make physical sense? The circuit is powered by an op-amp like the OPA2134, which typically runs on ±15V rails. An output of -10.5V is well within the linear swing range (avoiding saturation). The unit is Volts, which is correct. The magnitude of the gain is 21. If we had used a single feedback resistor to achieve a gain of -21 with a 10 kΩ input resistor, we would need a 210 kΩ feedback resistor. The T-network successfully synthesized this high gain using much lower, more practical resistor values (max 100 kΩ), which aligns perfectly with the design intent of T-networks.

How to verify the answer independently:
You can verify this using Superposition or by running a quick DC operating point simulation in LTspice. To verify via source transformation (Thevenin):
1. Disconnect the op-amp output and look back into R4 and R3 from Node A.
2. Alternatively, use the standard T-network gain formula derived from these KCL steps: Av = - [ (R2 + R4 + (R2*R4)/R3) / R1 ].
3. Plugging in our values: Av = - [ (10k + 100k + (10k*100k)/10k) / 10k ] = - [ 110k + 100k ] / 10k = -210k / 10k = -21.
Multiplying by Vin (0.5V) yields -10.5V, confirming our nodal analysis was flawless.

FAQ: Example Op Amp Circuits

Why do we use a T-network in example op amp circuits instead of one large resistor?

In practical PCB design, using a single massive resistor (e.g., 10 MΩ) to achieve high gain introduces severe parasitic capacitance, thermal noise (Johnson-Nyquist noise), and susceptibility to board leakage currents. A T-network allows you to synthesize an equivalent mega-ohm feedback impedance using standard, low-noise, tight-tolerance resistors in the 10 kΩ to 100 kΩ range. This keeps the circuit stable at higher frequencies and minimizes noise floor issues, a critical concept covered in Texas Instruments Precision Labs training modules.

How does input bias current affect this specific T-network circuit?

Real op-amps draw a small input bias current (IB) into their input pins. In a BJT-input op-amp like the LM741, IB might be 80 nA. This current flows through the equivalent resistance seen by the inverting node, creating an unwanted DC offset voltage at the output. Because the T-network effectively multiplies the resistance seen by the output, it also multiplies the DC error caused by IB. To mitigate this in high-precision designs, you must select a FET-input or CMOS op-amp (like the TL072 or OPA2134) where IB is in the picoamp range, or add a compensation resistor to the non-inverting pin.

What happens if the op-amp output saturates in this configuration?

If Vin increases such that the calculated Vout exceeds the op-amp's supply rails (e.g., trying to output -18V on a ±15V supply), the op-amp saturates. The virtual short assumption (V- = V+) instantly breaks down because the feedback loop can no longer supply enough current to maintain equilibrium. V- will no longer be 0V, and the output will clip at the negative rail limit (typically around -13.5V to -14V for a standard TL072). Always check your supply voltages against the calculated Vout before finalizing a design.