Every real-world capacitor contains parasitic elements that deviate from ideal textbook behavior. The most critical of these for power supply and signal filtering design is equivalent series resistance (ESR). ESR is the cumulative internal resistance of the capacitor's leads, electrodes, and dielectric losses, modeled as a single resistor in series with the ideal capacitance. For a standard 100µF aluminum electrolytic capacitor, ESR typically ranges from 0.15Ω to 1.0Ω at 100kHz, while a ceramic MLCC of the same value can drop below 0.005Ω. Ignoring ESR in switching power supplies leads to catastrophic output ripple, thermal runaway, and control loop instability.
The Real-World Capacitor Topology
To accurately simulate or calculate circuit behavior, we model a physical capacitor using a series topology. This model captures the high-frequency and transient limitations that an ideal capacitor misses.
- Node A (Anode/Positive Terminal): The external physical connection point.
- Node X (Internal Junction 1): The node between the terminal resistance and the parasitic inductance.
- Node Y (Internal Junction 2): The node between the equivalent series inductance (ESL) and the equivalent series resistance (ESR).
- Node B (Cathode/Negative Terminal): The return path to ground, completing the circuit through the ideal capacitance (C).
In this topology, current flowing into Node A must first pass through the resistive and inductive parasitics before charging the ideal dielectric at Node Y. At low frequencies, the impedance is dominated by the ideal capacitance (C). However, at switching frequencies (e.g., 500kHz in a buck converter), the capacitive reactance ($X_c = 1 / 2\pi fC$) drops so low that the ESR becomes the dominant factor determining the total impedance ($Z$).
ESR Behavior Matrix and Chemistry Data
Understanding how ESR shifts under different operating conditions is crucial for reliability. The table below maps what happens to your circuit when specific elements in the capacitor model change.
| Parameter Changed | Effect on Total Impedance (Z) | Effect on Ripple Voltage | Effect on Thermal Dissipation | Effect on LDO Phase Margin |
|---|---|---|---|---|
| ESR Increases (Electrolyte Aging) | Increases linearly at high-freq | Spikes proportionally | Increases ($I^2R$ losses) | Improves (adds a stabilizing zero) |
| ESR Decreases (Swapping to MLCC) | Drops to near ESL limit | Minimizes significantly | Negligible heating | Degrades (risk of oscillation) |
| ESL Increases (Long PCB Traces) | Spikes at very high-freq (>10MHz) | Causes high-freq ringing | No major DC thermal impact | Minimal effect on base loop |
| Capacitance Drops (DC Bias Effect) | Increases at low-freq | Increases low-freq droop | No direct thermal impact | Shifts pole frequency higher |
Because ESR varies wildly depending on the dielectric chemistry, selecting the right component family is your first line of defense. Here is a data-dense comparison of common 100µF capacitor chemistries evaluated at a 100kHz switching frequency:
| Chemistry | Typical ESR @ 100kHz | Max Ripple Current | Cost (per unit) | Primary Failure Mode |
|---|---|---|---|---|
| Aluminum Electrolytic (Standard) | 0.300Ω - 0.800Ω | 300mA - 500mA | $0.15 - $0.30 | Electrolyte boil-off (Open/High ESR) |
| Aluminum Electrolytic (Low-ESR) | 0.080Ω - 0.150Ω | 800mA - 1.2A | $0.40 - $0.75 | Vent cap rupture if reverse biased |
| Solid Tantalum (MnO2) | 0.050Ω - 0.100Ω | 1.0A - 1.5A | $1.20 - $2.50 | Thermal runaway / short-circuit fire |
| Aluminum Polymer / OS-CON | 0.010Ω - 0.025Ω | 2.0A - 4.0A | $1.50 - $3.00 | Gradual capacitance loss over time |
| MLCC (X7R, Multi-layer) | 0.003Ω - 0.008Ω | 3.0A+ | $0.80 - $1.50 | Micro-cracking / piezoelectric noise |
Design Walkthrough: Sizing Output Capacitors for a Buck Converter
Let us apply this to a real design. You are building a 12V-to-5V buck converter using the Texas Instruments TPS5430 to drive a 3A load. The switching frequency is 500kHz. Your design specification mandates a maximum output voltage ripple ($\Delta V_{out}$) of 50mV.
First, calculate the inductor ripple current ($\Delta I_L$). Assuming a 30% ripple ratio on the 3A load:
$\Delta I_L = 3A \times 0.30 = 0.9A$
In a switching converter, the output ripple voltage is primarily determined by the ESR of the output capacitor, not its capacitance. The formula is:
$\Delta V_{ESR} = \Delta I_L \times ESR$
Rearranging to find the maximum allowable ESR:
$ESR_{max} = 50mV / 0.9A = 55.5m\Omega$ (or 0.055Ω)
The Component Selection Trap: A junior designer might select a standard 100µF/16V aluminum electrolytic capacitor because the capacitance is sufficient to hold the charge. However, a standard electrolytic has an ESR of ~0.400Ω. The resulting ripple would be $0.9A \times 0.400\Omega = 360mV$—far exceeding the 50mV spec and potentially resetting downstream microcontrollers.
The Fix: You must select a low-ESR chemistry. A Kemet A720 Aluminum Polymer capacitor (150µF, 6.3V) features a guaranteed maximum ESR of 12mΩ (0.012Ω) at 100kHz. Recalculating the ripple: $0.9A \times 0.012\Omega = 10.8mV$. This easily clears the 50mV specification while providing excellent thermal margins. As noted in All About Circuits' guide on capacitor parasitics, always verify the ESR at your specific switching frequency, as manufacturer datasheets often only list 100kHz or 120Hz benchmarks.
Why Series Resistance Dominates Over Parallel Leakage
An alternative way to model a non-ideal capacitor is using a parallel topology, where a high-value leakage resistor ($R_p$) is placed in parallel with an ideal capacitor. Why do power engineers obsess over the series ESR model instead?
The answer lies in the time domain of the application. Parallel leakage resistance models DC behavior—specifically, how fast a capacitor self-discharges when left unpowered. In an aluminum electrolytic, $R_p$ might be 10MΩ. In a switching power supply or an AC coupling network, the operational frequencies are in the kHz to MHz range. At 500kHz, the reactance of a 100µF capacitor is roughly 3mΩ. A 10MΩ parallel resistor has absolutely zero mathematical impact on a 3mΩ branch. The series ESR, however, is in the direct current path and scales linearly with the AC ripple current. Therefore, for any topology involving AC ripple, transient response, or high-frequency filtering, the series ESR model is the only one that yields actionable data.
Extreme Failure Modes: Zero ESR and Open-Circuit ESR
What happens when we push the ESR value to its mathematical extremes? Both ends of the spectrum cause catastrophic system failures, but for entirely different reasons.
If ESR drops to exactly 0Ω (or near-zero, as with MLCCs), the capacitor acts as a pure short to high-frequency noise. While this sounds ideal for filtering, it breaks older Low-Dropout (LDO) regulators. LDOs like the classic LM1117 rely on the ESR zero to compensate their internal control loop. If you use an MLCC with < 0.1Ω ESR on the output of an LM1117, the phase margin collapses, and the regulator will oscillate wildly, destroying the output voltage rail. Always check the TI Powerhouse guidelines on LDO stability to see if your specific regulator requires a minimum ESR.
The Open-Circuit Extreme (ESR $\rightarrow \infty$):
Conversely, if ESR spikes to infinity, the capacitor has effectively become an open circuit. In aluminum electrolytics, this occurs when the internal electrolyte boils off due to prolonged exposure to heat or excessive ripple current. The capacitance meter on your multimeter might still read "100µF" at 1Hz, but at switching frequencies, the component is dead. The result is unfiltered ripple slamming into your load, massive voltage droops during transient current spikes, and eventual thermal destruction of the switching MOSFETs due to hard-switching ringing.
Breadboard Testing: Measuring ESR Step-by-Step
You do not need a $2,000 LCR meter to estimate ESR on the bench. You can extract a highly accurate ESR value using a function generator, an oscilloscope, and a precision resistor. This voltage-divider method isolates the resistive component at high frequency.
- Prepare the Circuit: Place your capacitor on the breadboard. Connect a 10Ω, 1% tolerance through-hole resistor in series with the capacitor's positive terminal (Node A). Connect the negative terminal (Node B) to the breadboard ground rail.
- Configure the Generator: Set your function generator to output a 100kHz sine wave with a 1V peak-to-peak amplitude and a 0V DC offset. Connect the generator output to the free leg of the 10Ω resistor.
- Probe the Nodes: Connect Oscilloscope Channel 1 to the generator side of the 10Ω resistor (measuring $V_{in}$). Connect Channel 2 across the capacitor itself, from Node A to Node B (measuring $V_{cap}$). Ensure your scope ground clips are tied to the same ground rail to avoid ground loops.
- Measure and Calculate: At 100kHz, the capacitive reactance of any capacitor larger than 1µF is negligible compared to the 10Ω resistor. The circuit acts as a simple resistive voltage divider where $V_{cap}$ is the voltage dropped across the ESR.
Use the formula: $ESR = R_{series} \times \frac{V_{cap}}{V_{in} - V_{cap}}$ - Example Result: If your scope reads $V_{in} = 1.00V$ and $V_{cap} = 0.045V$ (45mV), the math yields: $10\Omega \times (0.045 / (1.00 - 0.045)) = 10 \times 0.047 = 0.47\Omega$. You have just confirmed the capacitor has an ESR of 470mΩ.
By treating ESR not as a minor footnote, but as the primary driver of high-frequency impedance, you transition from guessing component values to engineering robust, thermally stable power delivery networks.
