A Class D amplifier operates on a fundamentally different principle than linear amplifiers. Instead of operating output transistors in their active (linear) region—where they act as variable resistors and burn massive amounts of heat—a class d amp circuit uses pulse-width modulation (PWM) to switch the output devices fully ON or fully OFF. Because the transistors spend almost zero time transitioning between states, theoretical efficiency approaches 100%, with real-world bench implementations routinely hitting 85% to 95%.
In this guide, we will dissect a discrete analog-PWM half-bridge topology, calculate real LC output filter values, analyze catastrophic failure modes, and walk through a low-voltage breadboard test sequence.
The Half-Bridge Topology: Signal Flow and Node Labels
To understand the circuit, we must track the signal from the analog input to the speaker cone. A basic discrete Class D amplifier relies on a comparator-based PWM modulator driving a complementary MOSFET half-bridge. Here are the critical nodes you will probe on your oscilloscope:
V_AUDIO: The analog input node. Typically a 1V peak-to-peak (Vpp) AC signal centered around a DC bias.V_TRI: The carrier wave node. A 250kHz, 3Vpp triangle wave generated by an oscillator (like an LM555 or a dedicated function generator).PWM_OUT: The output of the comparator (e.g., LM311). This node comparesV_AUDIOandV_TRI, outputting a 250kHz square wave where the duty cycle is proportional to the instantaneous audio voltage.SW_NODE: The switch node. This is the physical junction between the high-side (P-channel) and low-side (N-channel) MOSFET drains. It violently swings between 0V and VCC (e.g., 12V) at 250kHz.V_OUT: The post-filter node. After passing through the LC low-pass filter, the high-frequency PWM carrier is stripped away, leaving only the amplified analog audio waveform to drive the speaker.
Why Class D Over Class AB? (And What Breaks at the Extremes)
If Class AB is the gold standard for audiophile linearity, why do we tolerate the electromagnetic interference (EMI) and layout headaches of Class D? The answer is thermal density. According to Analog Devices, Class D efficiency allows for massive power output without the need for extruded aluminum heatsinks, making it mandatory for modern portable and high-density audio gear.
| Criterion | Class AB (Linear) | Class D (Switching) |
|---|---|---|
| Typical Efficiency | 50% - 65% | 85% - 95% |
| Heat Dissipation (at 50W out) | ~25W (Requires large heatsink) | ~3W (Bare silicon or tiny clip) |
| Output Filter Required? | No (Direct coupled) | Yes (LC low-pass mandatory for EMI) |
| Primary Distortion Source | Crossover distortion at zero-crossing | Dead-time nonlinearity and filter phase shift |
Failure Modes at the Extremes
Unlike linear amps that gracefully clip or thermally shut down, a class d amp circuit fails catastrophically if you violate its switching boundaries.
If you disconnect the speaker or omit the capacitor in the LC filter, the inductor's stored magnetic energy ($E = \frac{1}{2}LI^2$) has nowhere to go when the MOSFETs switch off. The resulting inductive kickback ($V = L \frac{di}{dt}$) will spike the
SW_NODE to hundreds of volts, instantly exceeding the MOSFET's avalanche rating and vaporizing the silicon. Always ensure the LC filter and load are connected before applying VCC.
If a solder bridge or failed component shorts the
SW_NODE to the power rail, the opposing MOSFET will create a dead short across the power supply when it turns on. This 'shoot-through' condition draws hundreds of amps in microseconds, popping the FETs and potentially lifting the copper traces off your PCB.
Design Walkthrough: Sizing the LC Output Filter
The LC filter is the most critical passive network in a class d amp circuit. It must pass the 20Hz–20kHz audio band while aggressively attenuating the 250kHz PWM carrier. A standard rule of thumb is to set the filter's cutoff frequency ($f_c$) between $\frac{1}{10}$ and $\frac{1}{5}$ of the switching frequency ($f_s$).
Let's design a filter for a 4Ω speaker load with a 250kHz switching frequency. We will target a cutoff frequency of 40kHz.
- Select the Inductor (L): We need an inductor that can handle the peak speaker current without saturating. For a 12V supply into a 4Ω load, peak current is roughly 3A. Using the Coilcraft Class D Amplifier Inductor Tool, we select a 10µH shielded power inductor rated for at least 5A saturation current (e.g., Coilcraft DO3316P-103ML).
- Calculate the Capacitor (C): Using the resonant frequency formula $f_c = \frac{1}{2\pi\sqrt{LC}}$, we rearrange to solve for C: $$C = \frac{1}{(2\pi \times 40,000)^2 \times 10\mu H} \approx 1.58\mu F$$
- Select Real-World Component: We will use a standard 1.5µF capacitor.
Breadboard-Testing the PWM Modulator Step-by-Step
Breadboarding a high-frequency switching circuit is notoriously difficult due to parasitic trace inductance (roughly 10nH per cm of jumper wire), which causes massive ringing on the SW_NODE. To test a class d amp circuit safely on a solderless breadboard, we use a low-voltage, low-power complementary MOSFET pair (IRF9540 P-channel and IRF540 N-channel) to avoid the complexity of high-side bootstrap drivers.
Tools Required: Solderless breadboard, LM311 comparator, IRF9540 & IRF540 MOSFETs, 10µH inductor, 1.5µF film cap, 4Ω 10W dummy load resistor, oscilloscope.
- Build and Verify the PWM Modulator: Wire the LM311 comparator. Feed a 1kHz sine wave into
V_AUDIOand a 250kHz triangle wave intoV_TRI. ProbePWM_OUT. You should see a 250kHz square wave whose duty cycle visibly widens and narrows in sync with the 1kHz sine wave. - Add the Gate Drive and Half-Bridge: Connect the
PWM_OUTto the gates of both the IRF9540 and IRF540. Note: In a discrete complementary setup without dead-time insertion, there will be a brief nanosecond shoot-through during transitions. At 12V, the MOSFETs can survive this for bench testing, but a dedicated gate driver with dead-time is mandatory for PCB integration. Apply 12V to VCC. - Probe the SW_NODE: Connect your oscilloscope ground to the circuit ground and the probe to
SW_NODE. You should see a 12Vpp square wave at 250kHz. Expect to see high-frequency ringing (parasitic oscillation) on the edges due to the breadboard's stray capacitance and jumper inductance. This is normal for a breadboard, but unacceptable on a final PCB. - Attach the LC Filter and Dummy Load: Connect the 10µH inductor from
SW_NODEtoV_OUT. Connect the 1.5µF film capacitor fromV_OUTto GND. Finally, connect the 4Ω dummy load resistor in parallel with the capacitor. - Verify the Output: Probe
V_OUT. The 250kHz carrier should be attenuated by at least -40dB, leaving a clean, amplified 1kHz sine wave. If the waveform looks like a triangle or has massive spikes, your LC filter components are incorrect or the inductor has saturated.
Class D Amp Circuit FAQ
Why does my class d amp circuit overheat at idle?
If your MOSFETs are burning hot with no audio playing (0% modulation), you are suffering from shoot-through current. In a Class D half-bridge, there must be a brief 'dead-time' (typically 10ns to 50ns) where both the high-side and low-side MOSFETs are OFF simultaneously during transitions. If your PWM modulator lacks dead-time insertion, both FETs conduct simultaneously for a few nanoseconds every 250kHz cycle, creating a direct short from VCC to GND. To fix this, use a dedicated half-bridge gate driver IC (like the IR2110 or TI DRV8300) which features hardware-programmable dead-time via a single resistor.
What is the ideal switching frequency for a class d amp circuit?
The industry sweet spot for analog-input Class D amplifiers is between 250kHz and 400kHz. According to Texas Instruments' Class D design guidelines, dropping below 150kHz requires physically massive and expensive LC filter components to prevent the carrier frequency from bleeding into the audio band. Conversely, pushing the switching frequency above 500kHz drastically increases switching losses ($P_{sw} = f_s \times V \times I \times t_{transition}$) in the MOSFETs, destroying your efficiency advantage and generating severe electromagnetic interference (EMI) that can disrupt nearby 2.4GHz WiFi and Bluetooth radios.
Why does my class d amp circuit buzz when no audio is playing?
Idle buzzing or 'hiss' in a discrete Class D design is almost always a layout or grounding issue, not a topology flaw. Because the SW_NODE swings 12V in nanoseconds, it generates massive $dv/dt$ noise. If your high-current ground loop (the path from the bulk decoupling capacitors, through the low-side MOSFET source, and back to the cap) shares a physical trace with the sensitive analog ground of the LM311 comparator, the switching noise will inject directly into the audio path. To fix this, you must implement a strict star-ground topology on your PCB, keeping the noisy power ground entirely isolated from the quiet analog ground until they meet at a single point at the power supply entry.






