Topology Breakdown: The CRC Pi-Filter Node Map
A CRC (Capacitor-Resistor-Capacitor) pi-filter is a second-order low-pass network. Unlike a simple single-pole RC filter, the dual-capacitor arrangement creates a steeper roll-off, making it ideal for isolating sensitive analog components from digital switching noise. The circuit is defined by four primary nodes and a common ground plane:
- Vin (Input Node): Connects to the noisy upstream power source (e.g., a buck converter output).
- N1 (First Junction): The electrical node between the input capacitor (C1) and the series damping resistor (R1). C1 acts as a bulk charge reservoir and shunts high-frequency noise from Vin directly to ground.
- N2 (Second Junction): The node between R1 and the output capacitor (C2). R1 isolates C1 from C2, preventing them from acting as a single parallel capacitor and forcing the high-frequency noise to dissipate as heat across the resistor.
- Vout (Output Node): Connects to the load (e.g., the VDD pin of an ADS1115 ADC). C2 provides local, ultra-low-impedance charge storage for transient load spikes.
- GND (Common Ground): The return path for all three components. In PCB design, this must be a solid, unbroken ground plane to prevent ground bounce.
Component Selection: A Real-World Design Walkthrough
Let us design a capacitors circuit to power the analog section of an ESP32-S3, which draws roughly 5mA during ADC sampling and requires less than 10mV of power rail ripple for 12-bit accuracy. We assume a 5V nominal rail from a switching regulator operating at 500kHz.
1. Select C1 (Input Bulk/Filter):
We need a capacitor with low Equivalent Series Resistance (ESR) to effectively shunt the 500kHz switching noise. We choose a 10µF, 16V X7R ceramic capacitor (e.g., Murata GRM21BR71H106KE12 in a 0805 package). X7R dielectric is chosen over Y5V because X7R maintains its capacitance under DC bias, whereas Y5V can lose up to 80% of its rated capacitance at 5V.
2. Select R1 (Series Isolation):
The resistor must drop minimal DC voltage while providing enough impedance to isolate the capacitors. At a 5mA load, a 10Ω resistor drops exactly 50mV (V = I × R = 0.005A × 10Ω). This leaves 4.95V for the ADC, well within its operating range. Power dissipation is P = I²R = (0.005)² × 10 = 0.25mW, which is safely handled by a standard 0603 1/10W resistor (e.g., Panasonic ERJ-3EKF10R0V).
3. Select C2 (Output Local Bypass):
We mirror C1 with another 10µF, 16V X7R ceramic capacitor. This creates a symmetrical filter. The dominant pole of this CRC pi-filter is approximated by the R1-C2 time constant: f_c = 1 / (2π × R1 × C2) = 1 / (2π × 10 × 10µF) ≈ 1.59kHz. Because it is a second-order filter, noise above 1.59kHz is attenuated at -40dB/decade, easily crushing the 500kHz switching ripple.
For a deeper understanding of how multi-pole filters affect data converter performance, refer to the Analog Devices guide on data converter power supply design.
Behavior Matrix: What Happens When Values Shift?
Component tolerances, temperature drift, and DC bias effects will alter your real-world values. Here is how the circuit behaves when elements deviate from the 10µF / 10Ω / 10µF baseline.
| Parameter Change | Effect on Cutoff Frequency | Effect on DC Voltage Drop | Practical Consequence |
|---|---|---|---|
| C1 increased to 100µF | Minimal change | None | Increases low-frequency bulk storage; drastically increases inrush current at startup. |
| R1 increased to 100Ω | Drops to ~159Hz | Increases to 500mV | Better noise rejection, but Vout drops to 4.5V, potentially causing brownouts under peak load. |
| C2 decreased to 1µF | Rises to ~15.9kHz | None | Allows more high-frequency switching noise to reach the ADC; degrades effective number of bits (ENOB). |
| X7R caps replaced with Y5V | Rises unpredictably | None | DC bias reduces actual capacitance by up to 80%, shifting the cutoff frequency much higher than calculated. |
Failure Mode Contrast: Open vs. Short Extremes
When debugging a dead board, you must understand what happens when a component in your capacitors circuit fails catastrophically. Ceramic capacitors typically fail short (due to mechanical cracking or overvoltage), while resistors typically fail open (due to overcurrent).
- C1 Shorts: Vin is shorted directly to GND. The upstream voltage regulator will immediately hit its over-current protection (OCP) limit and shut down, or the PCB trace will burn. Vout drops to 0V. This is a hard system failure.
- C1 Opens: The first pole is lost. The circuit degrades into a simple first-order RC filter (R1 + C2). Low-frequency ripple from the switching regulator will increase at N1, but high-frequency noise is still attenuated. The ADC may exhibit slight low-frequency drift.
- R1 Opens: Current flow to N2 is interrupted. Vout drops to 0V. The ADC loses power and ceases communication. This is easily diagnosed with a multimeter showing 5V at N1 and 0V at N2.
- C2 Shorts: Vout is shorted to GND. R1 now acts as a current limiter. With 5V across a 10Ω resistor, current spikes to 500mA. A standard 0603 resistor will overheat and pop open within seconds, turning the failure into an R1 Open scenario. Always ensure R1's power rating or an upstream fuse can handle this transient.
- C2 Opens: The second pole is lost. The circuit becomes a bulk capacitor feed with a series resistor. High-frequency transient noise generated by the ADC's internal sampling capacitor will cause voltage spikes on the Vout rail, ruining measurement accuracy.
Breadboard Verification: Step-by-Step Testing
Before committing to a PCB layout, validate the capacitors circuit on a breadboard. Note that breadboard parasitic capacitance (typically 2-5pF per row) and lead inductance will slightly alter high-frequency performance, but the dominant poles will remain accurate.
- Assemble the Network: Insert C1, R1, and C2 into the breadboard. Keep the jumper wires as short as possible (under 1cm) to minimize series inductance. Connect the common ground rail securely.
- Inject the Signal: Use a function generator (e.g., Rigol DG1022) to output a 5V DC offset with a 100mV peak-to-peak sine wave riding on top. Set the initial frequency to 100Hz. Feed this into the Vin node.
- Probe N1 and Vout: Connect two oscilloscope probes (set to 1X attenuation for better low-voltage resolution, or 10X with proper scaling) to N1 and Vout. Set the oscilloscope (e.g., Siglent SDS1104X-E) to AC coupling to block the 5V DC offset and zoom in on the 100mV ripple.
- Sweep the Frequency: Slowly increase the function generator frequency from 100Hz up to 1MHz. Observe the amplitude at Vout. You should see the ripple amplitude remain flat until roughly 1.5kHz, after which it should drop off sharply at a rate of -40dB per decade.
- Verify DC Drop: Switch the oscilloscope back to DC coupling and measure the exact DC voltage at Vout while the ADC is actively sampling. It should read 4.95V, confirming the 50mV drop across R1.
FAQ: Common Capacitors Circuit Questions
Why use a CRC capacitors circuit instead of an LC filter?
An LC (Inductor-Capacitor) pi-filter offers superior DC efficiency because an inductor drops virtually zero DC voltage compared to a resistor. However, inductors introduce two major problems in mixed-signal designs: electromagnetic interference (EMI) and high-Q resonance. If the LC filter's resonant frequency aligns with your switching regulator's frequency, it will actually amplify the noise rather than filter it. A CRC capacitors circuit uses a resistor to deliberately dampen the Q-factor, eliminating resonance ringing and preventing the inductor from acting as an antenna that radiates noise into nearby analog traces. For low-current loads (under 50mA), the minor voltage drop across the resistor is a highly acceptable trade-off for guaranteed stability.
How do I prevent inrush current from destroying this capacitors circuit?
When power is first applied, C1 and C2 act as dead shorts until they charge. If your upstream power supply can deliver 5A, the inrush current into a 10µF ceramic capacitor can easily spike high enough to damage the power supply's output stage or trip its OCP prematurely. To mitigate this, you can add a small NTC thermistor in series with Vin, or rely on the soft-start circuitry built into modern switching regulators (like the TPS62160). If the upstream supply is a USB port, ensure the total capacitance of your capacitors circuit does not exceed the USB specification limit (typically 10µF to 22µF max for unconfigured devices) to avoid triggering the host port's overcurrent shutdown.
Does the physical placement of the capacitors circuit matter on a PCB?
Absolutely. The schematic is only half the design; the physical layout dictates the real-world impedance. In a CRC pi-filter, C2 is your highest-frequency bypass element. It must be placed as physically close to the ADC's VDD and GND pins as possible, ideally on the same side of the board, with vias dropping directly to the ground plane immediately adjacent to the capacitor pads. If you place C2 an inch away, the PCB trace connecting it to the ADC adds roughly 1nH of inductance per millimeter. At 100MHz, just 10mm of trace adds 10nH of inductance, which creates an impedance of over 6 ohms, completely rendering the low-impedance path of C2 useless. For further layout strategies, consult the Texas Instruments application note on ADC PCB layout.
