A class A amp circuit conducts current over the full 360° of the input signal cycle, delivering the lowest total harmonic distortion (THD) of any amplifier topology at the cost of high quiescent power dissipation. For sub-1W audio preamps, sensor signal conditioning, or RF driver stages, the voltage-divider biased common-emitter topology using a standard 2N3904 NPN transistor remains the definitive bench choice. This guide provides the exact component values, bias math, and failure-mode analysis needed to build and verify one on your bench today.
Why Choose a Class A Amp Circuit Over Class AB or D?
While Class D switching amplifiers (like the TPA3116) dominate 2026 consumer audio for their >90% efficiency, and Class AB push-pull stages handle medium-power output, Class A remains unmatched for linearity. Because the active device never cuts off, there is zero crossover distortion. The trade-off is thermal: a Class A stage dissipates maximum power when sitting idle (no signal).
| Application Requirement | Recommended Topology | Why? |
|---|---|---|
| Output > 10W, battery powered | Class D | Efficiency >90%, minimal heatsinking required. |
| Output 1W - 10W, mains powered | Class AB | Balances efficiency (~60%) with acceptable crossover distortion. |
| Output < 1W, ultra-low THD preamp | Class A | Zero crossover distortion, simple biasing, widest bandwidth. |
| RF small-signal amplification | Class A | Predictable S-parameters, no switching noise harmonics. |
Topology Breakdown: The Voltage-Divider Biased Common Emitter
The most stable Class A configuration is the common-emitter amplifier with voltage-divider bias and an emitter degeneration resistor. This topology anchors the DC operating point (Q-point) against variations in transistor beta (hFE) and temperature.
Node Labels & Signal Path:
- VCC: Positive supply rail (9V DC).
- Node B (Base): High-impedance input node. Receives the AC signal via a coupling capacitor and sits at a fixed DC bias voltage set by the R1/R2 divider.
- Node C (Collector): High-impedance output node. The amplified, inverted AC signal is extracted here through a second coupling capacitor.
- Node E (Emitter): Low-impedance reference node. Tied to GND through a resistor (Re) to provide negative DC feedback for thermal stability.
- GND: 0V reference for the power supply and signal return.
For a deep dive into the small-signal AC equivalent models of this topology, the All About Circuits semiconductor textbook provides excellent AC load-line visualizations.
Design Walkthrough: Sizing Real Components for a 9V Preamp
Let's design a working stage. We will use a 9V battery supply (VCC = 9V) and target a quiescent collector current (Ic) of roughly 2mA to 2.5mA, which provides a good balance of gain and low power consumption for a 2N3904.
- Set the Emitter Voltage (Ve): Rule of thumb is to drop 10% of VCC across the emitter resistor for thermal stability. Ve = 1V.
- Pick Re: Choose a standard E12 value. Let's use Re = 470Ω. This sets our emitter current: Ie = Ve / Re = 1V / 470Ω ≈ 2.12mA. Since Ic ≈ Ie, our collector current is ~2.1mA.
- Pick Rc: We want the collector voltage (Vc) to sit near the middle of the supply for maximum symmetrical swing. Let's choose Rc = 1kΩ. The voltage drop across Rc is V_Rc = 2.1mA × 1kΩ = 2.1V. Therefore, Vc = 9V - 2.1V = 6.9V. The quiescent Vce is 6.9V - 1V = 5.9V. This is an excellent Q-point.
- Calculate Base Voltage (Vb): Vb = Ve + Vbe. Assuming a standard silicon Vbe drop of 0.7V, Vb = 1V + 0.7V = 1.7V.
- Size the Voltage Divider (R1 and R2): To make the bias 'stiff' (immune to base current draw), the current through the divider should be roughly 10× the base current (Ib). Assuming a conservative 2N3904 beta (hFE) of 100, Ib = 2.1mA / 100 = 21µA. Divider current = 210µA.
- R2 = Vb / 210µA = 1.7V / 0.00021A = 8.09kΩ. Nearest E12 standard: 8.2kΩ.
- R1 = (VCC - Vb) / 210µA = (9V - 1.7V) / 0.00021A = 34.7kΩ. Nearest E12 standard: 33kΩ.
Behavior Matrix: What Happens When You Change One Element
Understanding how each component affects the DC bias and AC gain is critical for debugging. Here is the behavioral matrix for the common-emitter Class A stage.
| Component Changed | Direction | Effect on DC Bias (Q-Point) | Effect on AC Voltage Gain |
|---|---|---|---|
| Rc (Collector Resistor) | Increase | Vc drops closer to Ve; risks saturation if too high. | Gain increases (Av ≈ -Rc/re). |
| Re (Emitter Resistor) | Increase | Ve rises, Vc rises, Ic drops significantly. | Gain decreases heavily (if unbypassed). |
| R1 (Upper Divider) | Decrease | Vb rises, transistor drives harder toward saturation. | Clipping on positive half-cycles. |
| R2 (Lower Divider) | Decrease | Vb drops, transistor moves toward cutoff. | Clipping on negative half-cycles. |
| Add Ce (Emitter Bypass Cap) | Add 10µF parallel to Re | No change to DC bias. | Gain increases massively at AC (bypasses Re). |
For further reading on how the internal emitter resistance (re) interacts with your external Re to set exact gain, refer to the Georgia State University HyperPhysics transistor gain module.
Failure Modes at the Extremes: Shorts and Opens
When a prototype fails, it is usually due to a breadboard fault or a miswired node. Here is exactly what breaks when elements fail at the extremes.
The Open Failures
- Open Emitter (Re disconnected): The circuit is broken. Ic drops to 0mA. Node C will measure exactly VCC (9V) because there is no voltage drop across Rc. The amplifier is dead.
- Open R1 (Upper divider missing): The base is pulled to GND solely through R2. Vb = 0V. The transistor is in hard cutoff. Vc = 9V.
- Open R2 (Lower divider missing): The base is pulled directly to VCC through R1. Base current becomes massive, driving the transistor into hard saturation. Vc will drop to roughly Ve + 0.2V (Vce(sat)).
The Short Failures
- Short Base-to-Emitter: Vb is forced to equal Ve. If the divider is stiff, Vb remains ~1.7V, meaning Ve is forced to 1.7V. Ie spikes to 1.7V / 470Ω = 3.6mA. The transistor runs hot, and the AC signal will severely clip on the negative swing.
- Short Collector-to-Emitter: Vc equals Ve. The output coupling capacitor will discharge to 1V DC. No AC gain is possible; the output is dead. If this happens due to a physical transistor failure, the 2N3904 is destroyed and must be replaced.
- Short across Rc: Node C is tied directly to VCC (9V). The transistor will attempt to pull 9V down to ground, limited only by its maximum Ic rating and Re. The 2N3904 will instantly overheat and fail, likely taking R1 and R2 with it if the power supply can deliver high current.
Step-by-Step Breadboard Testing and Bias Verification
Do not just plug it in and hope. Follow this sequence to verify the DC bias before applying an AC signal.
- Place the Active Device: Insert the 2N3904 into the breadboard. Ensure the flat side faces you: Pin 1 (Emitter), Pin 2 (Base), Pin 3 (Collector).
- Wire the Bias Network: Install R1 (33kΩ) from the VCC rail to the Base. Install R2 (8.2kΩ) from the Base to the GND rail.
- Wire the Load and Emitter: Install Rc (1kΩ) from VCC to the Collector. Install Re (470Ω) from the Emitter to the GND rail.
- Add Coupling Capacitors: Place a 10µF electrolytic capacitor with the positive lead connected to the Base (AC input). Place a second 10µF capacitor with the positive lead connected to the Collector (AC output). Note: Observe polarity; reverse-biased electrolytics will leak and shift your bias.
- Power Up and Measure DC: Connect your 9V supply. Set your digital multimeter (DMM) to DC Volts. Measure the voltage at Node C (Collector) relative to GND. You should read between 6.2V and 7.2V (accounting for 5% resistor tolerance and beta variance).
- Verify Emitter Voltage: Measure Node E. It should read between 0.9V and 1.2V. If Ve is 0V, your transistor is dead or wired backward. If Ve is >2V, your base divider is wrong.
- Inject AC Signal: Connect a function generator to the input capacitor. Set it to 1kHz, 50mV peak-to-peak sine wave. Connect an oscilloscope to the output capacitor. You should see an inverted sine wave with a peak-to-peak amplitude of roughly 1V to 2V, depending on whether you added an emitter bypass capacitor.
By anchoring your design to these specific component values and verifying the node voltages step-by-step, you eliminate the guesswork from analog design. The Electronics Tutorials common emitter guide offers further oscilloscope trace examples if you need to compare your bench results against theoretical waveforms. Build it, measure it, and trust the math.
