To check a capacitor in circuit without desoldering, you must use a dedicated ESR (Equivalent Series Resistance) meter that injects a ~100 kHz AC signal, or an oscilloscope to measure voltage ripple. Standard multimeter capacitance modes fail in-circuit because parallel semiconductor junctions and inductors skew the low-frequency DC test charge. By analyzing the capacitor within its actual operating topology—specifically the high-stress output filter of a switching regulator—you can accurately diagnose degradation while the component remains soldered to the board.

The Target Topology: Buck Converter Output Filter

When engineers ask how to check a capacitor in circuit, they are usually troubleshooting a power supply. The most common topology requiring this is the Buck Converter LC Output Filter. We choose this topology over a linear regulator (LDO) for diagnostic study because switching nodes subject the output capacitor to high RMS ripple current, making it the number one failure point in modern power electronics.

Topology Node Map:
  • Node_SW (Switch Node): The chaotic square-wave junction between the high-side MOSFET, low-side diode/FET, and the inductor.
  • L1 (Inductor): Stores energy and limits di/dt.
  • Node_VOUT (Output Node): The filtered DC output where the inductor, capacitor, and load meet.
  • C1 (Output Capacitor): Smooths the inductor's triangular current ripple into a flat DC voltage.
  • Node_GND: The common return path.

In this configuration, C1 does not just hold charge; it must rapidly absorb and release high-frequency AC current. According to Analog Devices guidelines on DC-DC passives, the capacitor's ESR directly dictates the output voltage ripple and the control loop's phase margin.

Component Selection & Design Walkthrough

To understand what we are testing, we must define the exact circuit parameters. Let's design a 12V-to-5V, 2A buck converter output stage.

  • L1: 10 µH shielded power inductor (e.g., Würth Elektronik 74477410, saturation current 4.5A).
  • C1: 150 µF, 10V, low-ESR radial electrolytic (e.g., Panasonic EEU-FR1A151). Datasheet ESR: 0.08 Ω max at 100 kHz.
  • R_Load: 2.5 Ω power resistor (simulating a 2A load at 5V).

At a standard 500 kHz switching frequency, the inductor passes a triangular ripple current of roughly 300 mA peak-to-peak into Node_VOUT. C1 must absorb this. If C1's ESR rises from 0.08 Ω to 0.5 Ω due to electrolyte drying, the output ripple voltage will spike from a harmless 24 mV to a problematic 150 mV, potentially causing logic errors in downstream microcontrollers.

Behavior Table: Degradation vs. Circuit Symptom

Parameter Healthy State (Panasonic FR) Degraded State (Dried Electrolyte) Observable Circuit Symptom at Node_VOUT
Capacitance (C) 150 µF 40 µF Slower transient recovery; voltage dips deeply during sudden load steps.
ESR (at 100 kHz) 0.08 Ω 1.20 Ω High-frequency switching ripple spikes; thermal runaway of the capacitor casing.
Leakage Current < 0.01 mA 5.0 mA Negligible effect on a 2A supply, but fatal in low-power standby circuits.

Failure Extremes: What Breaks When C1 Opens or Shorts?

Before probing Node_VOUT with meters, you must understand the catastrophic extremes of C1 failure. Testing a dead-short with an ESR meter is safe, but powering the board is not.

Extreme 1: C1 Fails Short

If the internal dielectric breaks down and C1 shorts Node_VOUT to Node_GND, the inductor (L1) will rapidly saturate. Once L1 saturates, it loses its inductance and becomes a low-resistance wire. The high-side MOSFET will attempt to pull Node_SW low against a dead short, exceeding its drain-source current limit in microseconds. Result: The input fuse blows, or the high-side MOSFET violently shorts the 12V input directly to ground, often cracking the IC package.

Extreme 2: C1 Fails Open

If the internal tab connection corrodes and C1 becomes an open circuit, the LC filter ceases to exist. Node_VOUT will no longer be filtered; it will swing wildly between 0V and 12V at the switching frequency. Furthermore, the feedback voltage divider will read this chaotic square wave, causing the PWM controller's error amplifier to saturate and the control loop to lose all phase margin. Result: Massive output oscillation that will instantly overvoltage and destroy the 5V load.

Decision Path: Step-by-Step In-Circuit Testing

Use this decision tree to determine your testing method. Never apply power to a board until Step 1 is cleared.

Step Tool & Action Expected Reading If Reading Fails / Next Action
1 DMM (Diode/Continuity Mode): Probe Node_VOUT to Node_GND. Diode drop (~0.4V) or OL (Open Line) due to parallel semiconductors. If 0.00 Ω: C1 or the load is dead-shorted. Do not apply power. Desolder C1 to isolate.
2 100 kHz ESR Meter: Probe directly across C1 terminals in-circuit. < 0.20 Ω (for 100µF+ caps). If > 0.50 Ω: Cap is degraded. Replace with a low-ESR polymer or 105°C electrolytic.
3 Oscilloscope (AC Coupled): Probe Node_VOUT with tip-and-barrel ground. < 30 mV peak-to-peak ripple at switching frequency. If > 100 mV: Confirm ESR. If ESR is good, check for inductor saturation or wrong compensation network.
The 100 kHz Trick: Why does an ESR meter work in-circuit when a standard multimeter fails? Standard multimeters use a slow DC charge/discharge curve to measure capacitance. In-circuit, parallel silicon (like the body diode of the low-side MOSFET) clamps the DC voltage at ~0.6V, confusing the meter. A dedicated ESR meter injects a 30 mV RMS signal at 100 kHz. At 100 kHz, the capacitive reactance ($X_c$) drops to near zero, meaning the meter only reads the pure resistive ESR. Furthermore, 30 mV is too low to forward-bias any parallel semiconductor junctions, effectively making them invisible to the test.

Breadboard Validation: Simulating the Fault

To build intuition for how to check a capacitor in circuit, build a scaled-down LC filter on a breadboard and intentionally degrade the capacitor.

  1. Generate Node_SW: Use an Arduino Uno. Upload a sketch that sets Pin 9 to output a 31,250 Hz PWM signal at a 50% duty cycle. (Standard 490 Hz PWM is too slow for a small LC filter).
  2. Build the Filter: Connect a 10 µH inductor from Pin 9 to a central breadboard rail (Node_VOUT).
  3. Add C1: Plug a 100 µF electrolytic capacitor from Node_VOUT to the GND rail.
  4. Measure Healthy State: Connect your oscilloscope to Node_VOUT. You should see a flat ~2.5V DC line with perhaps 20 mV of high-frequency ripple.
  5. Simulate ESR Degradation: Without removing the capacitor, plug a 1.0 Ω resistor in series with the capacitor's positive leg. This artificially injects 1.0 Ω of ESR into the topology.
  6. Measure Degraded State: Probe Node_VOUT again. The DC level remains ~2.5V, but you will now see a massive sawtooth ripple superimposed on the DC, visually proving how ESR destroys power integrity without necessarily changing the DC multimeter reading.

Final Recommendation: The Right Tool for the Job

If you are maintaining power supplies, motherboards, or audio amplifiers, desoldering every suspect capacitor to test it on a benchtop LCR meter is a waste of time and risks lifting PCB pads. The decision path always terminates on the same requirement: you need a dedicated in-circuit ESR meter.

The Concrete Pick: For 95% of bench and field diagnostics, purchase the Signstek MESR-100 (or its identical clone, the BSIDE ESR02), typically priced around $45 to $60. These units auto-discharge the capacitor before testing, inject the required 100 kHz AC signal, and feature a standard ZIF socket for bench work alongside included probes for in-circuit work. Do not rely on the capacitance mode of a Fluke 87V or similar premium DMM for in-circuit diagnostics; they are exceptional multimeters, but they are not ESR meters.