Charge carriers in a semiconductor are the free electrons (negative) and holes (positive) that move through the crystal lattice to conduct electricity when an electric field is applied. This fundamental behavior dictates the on-resistance ($R_{DS(on)}$), switching speed, and thermal limits of every diode, BJT, and MOSFET on your workbench. Beginners commonly confuse intrinsic carrier generation (pure material, heat-driven) with extrinsic doping (adding impurities to force conductivity), leading to fundamental misunderstandings about why a component experiences thermal runaway at high temperatures.
The Data: Doping Concentrations and Carrier Mobility in a Semiconductor
To select the right power device for a high-frequency inverter or a high-voltage DC bus, you need to look past the marketing datasheets and understand the underlying physics. The bandgap determines the maximum operating temperature and breakdown voltage, while carrier mobility dictates how fast the device can switch and how low the conduction losses will be. Below is the reference data for the three dominant power materials used in modern 2026 power electronics.
| Material | Bandgap (eV) | Electron Mobility ($cm^2/V\cdot s$) | Hole Mobility ($cm^2/V\cdot s$) | Typical Drift Doping ($cm^{-3}$) | Critical Electric Field ($kV/cm$) |
|---|---|---|---|---|---|
| Silicon (Si) | 1.12 | 1,350 | 480 | $10^{14}$ - $10^{16}$ | 300 |
| Silicon Carbide (4H-SiC) | 3.26 | 900 | 115 | $10^{15}$ - $10^{17}$ | 2,500 |
| Gallium Nitride (GaN) | 3.39 | 1,500 (2DEG) | N/A (Unipolar) | $10^{13}$ (2DEG sheet) | 3,300 |
| Germanium (Ge) | 0.67 | 3,900 | 1,900 | $10^{15}$ - $10^{17}$ | 100 |
Worked Example: Calculating Drift Current Density
Let's translate the table above into a real-world calculation. When you apply a voltage across the drift region of an n-type silicon MOSFET, the resulting current is governed by the drift current density equation:
$J = q \cdot n \cdot \mu_n \cdot E$
Where:
- $J$ = Drift current density ($A/cm^2$)
- $q$ = Elementary charge ($1.602 \times 10^{-19} C$)
- $n$ = Electron concentration (doping level, $cm^{-3}$)
- $\mu_n$ = Electron mobility ($cm^2/V\cdot s$)
- $E$ = Applied electric field ($V/cm$)
The Scenario: You are analyzing the drift layer of a 100V n-channel silicon MOSFET. The manufacturer doped the drift region to $n = 1 \times 10^{15} cm^{-3}$. The electron mobility for silicon at this doping level is roughly $1350 cm^2/V\cdot s$. During conduction, the voltage drop across the 10 $\mu m$ (0.001 cm) thick drift layer is 1V, creating an electric field $E = 1V / 0.001cm = 1000 V/cm$.
The Calculation:
$J = (1.602 \times 10^{-19} C) \times (1 \times 10^{15} cm^{-3}) \times (1350 cm^2/V\cdot s) \times (1000 V/cm)$
$J = 21.627 A/cm^2$
What this means for your circuit: If your application requires the MOSFET to pass 50A continuously, the silicon die must have a minimum cross-sectional area of $50A / 21.627 A/cm^2 = 2.31 cm^2$ just to handle the drift region current without excessive heating. This is why high-current silicon MOSFETs are physically large and require massive TO-247 packages or parallel configurations. According to Georgia State University's HyperPhysics semiconductor models, increasing the doping ($n$) would increase $J$, but doing so lowers the breakdown voltage of the device—a direct engineering tradeoff.
Where You Meet This in Practice: Si vs. SiC vs. GaN Selection
Understanding carrier mobility and bandgap dictates how you select components for modern power supplies, solar inverters, and motor drives. Here is how the physics translates to the parts bin in 2026.
Silicon (Si): The Low-Frequency Workhorse
Use standard Si MOSFETs (like the classic IRFP460) for applications under 600V and switching frequencies below 50kHz. Silicon's relatively narrow 1.12 eV bandgap means intrinsic carrier generation spikes at high temperatures, causing leakage currents that can lead to thermal runaway above 150°C. It remains the cheapest option for 12V/24V DC-DC converters and low-speed motor control.
Silicon Carbide (SiC): High Voltage and High Heat
When designing an 800V EV charger or a string inverter for a solar array, SiC is mandatory. The 3.26 eV bandgap of 4H-SiC virtually eliminates intrinsic thermal generation. You can run a SiC MOSFET (like the Wolfspeed C3M0032120K) at 175°C junction temperatures with minimal leakage. Because of its high critical electric field, the drift layer is thin, keeping switching losses low even at 100kHz. However, SiC gate drivers must be designed carefully to handle the higher $dv/dt$ transients without ringing.
Gallium Nitride (GaN): Ultra-High Frequency
GaN devices (like the EPC2212) utilize a 2-Dimensional Electron Gas (2DEG) at the AlGaN/GaN heterojunction. This creates a channel with exceptionally high electron mobility, allowing switching frequencies well into the MHz range. Use GaN for compact 48V server power supplies, LiDAR pulser circuits, and ultra-compact USB-C PD adapters. The tradeoff is that GaN is currently limited to lower voltages (typically <650V) and is highly sensitive to gate overvoltage; a gate drive exceeding 6V can permanently damage the device.
Common Confusions and Component Troubleshooting
When debugging power circuits or studying for an electronics exam, a few misconceptions about charge carriers in a semiconductor frequently lead to design errors.
Are 'holes' actual physical particles moving through the lattice?
No. A hole is simply the absence of an electron in a covalent bond. Think of a traffic jam on a highway: as cars (electrons) inch forward into an empty space, the empty space (hole) effectively moves backward. The hole acts as a positive charge carrier mathematically, but physically, it is just valence electrons jumping between adjacent bonds. This is why hole mobility is always significantly lower than electron mobility; the valence band physics make it a much more restrictive path.
Does heavier doping always mean lower resistance?
Up to a point, yes. Adding more dopant atoms increases the carrier concentration ($n$ or $p$). However, as noted in University of Colorado Boulder's semiconductor device text, once doping exceeds roughly $10^{18} cm^{-3}$, impurity scattering becomes dominant. The sheer number of ionized dopant atoms gets in the way of the moving carriers, causing mobility ($\mu$) to drop sharply. This is why heavily doped source/drain regions in a MOSFET still exhibit measurable parasitic resistance.
Why did my SiC MOSFET fail when my silicon MOSFET survived the same gate drive circuit?
Silicon MOSFETs typically require a 10V to 15V gate-to-source voltage ($V_{GS}$) to fully enhance the channel. SiC MOSFETs often require 15V to 18V to achieve the lowest $R_{DS(on)}$, but their absolute maximum $V_{GS}$ rating is usually much tighter (often +22V/-10V). If your gate driver rings or overshoots due to parasitic trace inductance, you can easily punch through the thin SiC gate oxide. Always use a dedicated SiC gate driver IC with active Miller clamping and tightly controlled negative turn-off bias (e.g., -3V to -5V) to prevent false turn-on from high $dv/dt$ coupling.
For a deeper dive into the quantum mechanics governing these behaviors, the All About Circuits semiconductor volume provides excellent visual breakdowns of the crystal lattice structures. Ultimately, mastering how carriers behave in a semiconductor bridges the gap between blindly copying reference designs and engineering robust, optimized power systems.
