Capacitor Differential Equation: Derivation, Unit Traps, and Bench Examples

The capacitor differential equation is i(t) = C × (dv(t)/dt). It dictates that the instantaneous current flowing through a capacitor is directly proportional to its capacitance and the rate at which the voltage across it changes over time. If the voltage is steady (DC), the derivative is zero, and the current is zero. If the voltage changes instantly, the derivative approaches infinity, demanding infinite current—a physical impossibility that leads to the real-world failures we'll analyze below.

The Core Equation, Symbol Map, and Rearranged Forms

To use this formula on the bench, you must understand exactly what each term represents physically. The water analogy holds up well here: if voltage is the water level in a tank, and capacitance is the physical width of the tank, then current is the flow rate of water required to change that level. A wide tank (high C) requires a massive flow rate (high i) to change the water level quickly (high dv/dt).

Depending on what you are trying to design or troubleshoot, you will need to isolate different variables. Here are the algebraically rearranged forms of the capacitor differential equation:

• Solving for Capacitance (Sizing a cap for a specific ripple): C = i(t) / (dv(t) / dt)
• Solving for Voltage Change (Calculating voltage droop/sag): dv(t) = (i(t) × dt) / C
• Solving for Time (Finding charge/discharge duration): dt = (C × dv(t)) / i(t)
• Solving for Current (Sizing traces or fuses for inrush): i(t) = C × (dv(t) / dt)

Bench Assumptions, Unit Traps, and Realistic Magnitudes

When the Formula Applies (and When It Doesn't)

This equation assumes an ideal capacitor with a linear dielectric. It ignores Equivalent Series Resistance (ESR), Equivalent Series Inductance (ESL), and dielectric absorption. At low frequencies or slow DC slew rates, the ideal equation is perfectly accurate. However, at high frequencies (e.g., a 100ns switching edge in a buck converter), ESL dominates the impedance, and the simple differential equation will under-predict the actual voltage overshoot. For those high-speed edge cases, you must model the capacitor as an RLC series circuit.

The Unit Trap That Bricks Prototypes

The most common mistake hobbyists and junior engineers make is mixing micro-units without tracking the powers of ten. The SI formula strictly requires Farads, Volts, Amperes, and Seconds.

A useful shortcut: if you use mA for current, µF for capacitance, and ms for time, the micro (10⁻⁶) and milli (10⁻³) prefixes interact in a way that leaves you with Volts per millisecond (V/ms) for the dv/dt term. While mathematically consistent, it's a cognitive trap. Convert everything to base SI units on your scratchpad to avoid blowing up a prototype.

Realistic Answer Magnitudes

What should your answer look like? If you are calculating signal coupling or logic gate displacement current, expect answers in the microamp (µA) to low milliamp (mA) range. If you are calculating power supply inrush current or motor drive bulk capacitor charging, expect answers in the tens to hundreds of Amperes. If your signal calculation yields 40 Amps, you missed a decimal point. If your power inrush calculation yields 15 mA, your time variable (dt) is likely in seconds instead of microseconds.

Worked Problem 1: Logic Gate Slew Rate and Displacement Current

Scenario: You are driving a long PCB trace that has a parasitic capacitance of 15 pF, plus a 100 pF discrete ceramic capacitor (C0G/NP0) used for filtering. The 3.3V logic gate output transitions from 0V to 3.3V in 4 nanoseconds (ns). What is the peak displacement current the logic gate must source?

Step 1: Identify and convert variables to base SI units.

• Total C = 15 pF + 100 pF = 115 pF = 115 × 10⁻¹² F
• dv = 3.3V - 0V = 3.3 V
• dt = 4 × 10⁻⁹ s

Step 2: Calculate the rate of voltage change (dv/dt).

• dv/dt = 3.3 V / (4 × 10⁻⁹ s)
• dv/dt = 825,000,000 V/s (or 0.825 V/ns)

Step 3: Apply the capacitor differential equation.

• i(t) = C × (dv/dt)
• i(t) = (115 × 10⁻¹² F) × (825 × 10⁶ V/s)
• i(t) = 0.094875 A

Outcome: The logic gate must source roughly 94.9 mA of peak current during that 4ns edge. This is well within the typical 25 mA absolute maximum rating of a standard 74HC series output, but if you were driving 20 of these lines simultaneously, the aggregate ground bounce could cause logic faults. For deeper reading on logic family drive capabilities, consult the SparkFun Logic Levels tutorial.

Worked Problem 2: Bulk Capacitor Inrush Current

Scenario: You are designing a soft-start circuit for a 48V DC-DC converter. The output bank consists of 4,700 µF of low-ESR aluminum electrolytic capacitance. Your soft-start controller ramps the voltage from 0V to 48V linearly over 15 milliseconds (ms). What is the continuous charging current during the ramp?

Step 1: Convert to base SI units.

• C = 4,700 µF = 4,700 × 10⁻⁶ F (or 4.7 × 10⁻³ F)
• dv = 48 V
• dt = 15 ms = 15 × 10⁻³ s

Step 2: Calculate dv/dt.

• dv/dt = 48 V / (15 × 10⁻³ s)
• dv/dt = 3,200 V/s

Step 3: Solve for i(t).

• i(t) = (4.7 × 10⁻³ F) × (3,200 V/s)
• i(t) = 15.04 A

Outcome: The power supply must deliver a steady 15.04 Amps for exactly 15ms to charge the bank. Because the ramp is linear, dv/dt is constant, meaning the current is a flat DC rectangle, not an exponential decay curve. Your upstream fuse and PCB traces must be rated to handle this 15A surge without nuisance tripping.

Real-World Scenario: The Vaporized MOSFET Bond Wires

Equations on a whiteboard are clean; physics on a workbench is unforgiving. Here is a failure analysis from a 24V motor controller prototype that perfectly illustrates what happens when the capacitor differential equation meets parasitic inductance and zero current limiting.

The Setup

A designer was switching a 24V brushed DC motor using an IRF3205 N-channel MOSFET in a TO-220 package. To suppress voltage spikes from the motor's inductance, they placed a massive 10,000 µF low-ESR polymer capacitor bank directly across the 24V supply rails, right next to the MOSFET drain. They used a high-speed gate driver that turned the MOSFET on in roughly 100 nanoseconds (ns). There was no NTC thermistor, no precharge resistor, and no hot-swap controller.

The Numbers

Let's run the differential equation for the exact moment the MOSFET turns on. The 10,000 µF bank is initially discharged (0V). When the MOSFET turns on, it attempts to pull the capacitor's negative terminal to ground, effectively applying 24V across the capacitor bank.

• C = 10,000 µF = 0.01 F
• dv = 24 V
• dt = 100 × 10⁻⁹ s (the MOSFET's turn-on time)

Calculating the demanded inrush current:

• i(t) = 0.01 F × (24 V / 100 × 10⁻⁹ s)
• i(t) = 0.01 × 240,000,000
• i(t) = 2,400,000 A (Theoretical Ideal)

The Outcome and What Went Wrong

Obviously, the power supply could not deliver 2.4 million amps. In reality, the Equivalent Series Resistance (ESR) of the capacitors, the resistance of the PCB copper, and the internal resistance of the battery limited the peak current to roughly 350 Amps.

However, 350 Amps is still catastrophic for a TO-220 package. The internal aluminum bond wires connecting the silicon die to the external leads in an IRF3205 are typically rated to fuse (melt) at around 150A to 200A for microsecond pulses. The massive dv/dt demanded a current spike that instantly vaporized the source bond wires. The MOSFET failed open-circuit, the gate driver blew out from the resulting inductive kickback, and the prototype was dead.

The Fix: The designer added a 10-ohm, 5-watt wirewound precharge resistor in parallel with a mechanical relay. The relay was delayed by 50ms, allowing the resistor to limit the initial dv/dt to a safe level (charging the caps slowly). Once the capacitors reached 23V, the relay closed, bypassing the resistor for normal high-current motor operation. For more on taming these spikes, review the fundamentals of capacitors and calculus to understand how adding resistance transforms the linear dv/dt into an exponential RC curve, drastically reducing the peak i(t) at t=0.