How to Calculate the Resonance Frequency of an LCR Circuit for Filter Design

The resonance frequency of an LCR circuit is the exact point where inductive reactance ($X_L$) and capacitive reactance ($X_C$) cancel each other out, leaving only the resistive component to dictate impedance. The governing formula is $f_r = \frac{1}{2\pi\sqrt{LC}}$. However, knowing the formula is only 10% of the design battle. The real engineering challenge lies in selecting the correct topology (series vs. parallel), picking components that won't drift under voltage or temperature stress, and managing the Q-factor to achieve your target bandwidth.

In this guide, we will design a 100 kHz series LCR bandpass filter for an ultrasonic sensor receiver, select exact off-the-shelf components, and map out the failure modes that separate a working prototype from a noisy bench failure.

Topology Decision: Series Bandpass vs. Parallel Tank

Before calculating values, you must lock in your topology. A series LCR circuit and a parallel LCR circuit exhibit opposite impedance behaviors at resonance. At $f_r$, a series circuit drops to its minimum impedance (equal to R), while a parallel circuit spikes to its maximum impedance. Choosing the wrong topology will load down your signal source or fail to pass the target frequency.

The Verdict: For signal conditioning—such as isolating a 100 kHz ultrasonic echo from broadband acoustic noise—the Series RLC Bandpass is the mandatory choice. It provides a low-impedance path at resonance, allowing the target frequency to pass into a high-impedance ADC or op-amp input without excessive signal attenuation. We will proceed exclusively with the Series RLC topology for this design.

Node Topology and Component Selection (100 kHz Design)

Our target resonance frequency is 100 kHz. We need to pick L and C to satisfy the resonance equation, and R to set the bandwidth via the Q-factor. The series bandpass topology routes the signal through the reactive components and drops the output across the resistor.

Node Mapping

• Node 1 ($V_{in}$): Signal input from the sensor or function generator.
• Node 2 ($V_{mid}$): Junction between the Capacitor (C) and Inductor (L).
• Node 3 ($V_{out}$): Junction between the Inductor (L) and Resistor (R). This is your filtered output.
• Node 4 (GND): Ground connection at the base of the Resistor (R).

Calculating Real Component Values

Using $f_r = \frac{1}{2\pi\sqrt{LC}}$, we rearrange to solve for C given a standard inductor value. Let's select L = 2.5 mH.
$C = \frac{1}{(2\pi \times 100,000)^2 \times 0.0025} \approx 1.013 \text{ nF}$.

We will use a standard 1 nF capacitor. This yields an actual $f_r$ of 100.6 kHz, well within the tolerance of standard audio/ultrasonic applications.

Next, we set the Q-factor to define our bandwidth. $Q = \frac{1}{R}\sqrt{\frac{L}{C}}$. For a Q of 10 (yielding a 10 kHz bandwidth, perfect for capturing a 100 kHz pulse burst), we need:
$R = \frac{1}{10}\sqrt{\frac{0.0025}{10^{-9}}} = \frac{1581}{10} = 158.1 \Omega$.

Bill of Materials (Exact Part Picks)

Behavior Matrix: Tuning the Resonance and Q-Factor

When you move from simulation to the bench, parasitics will force you to tweak values. Use this matrix to predict how swapping a single component alters the circuit's behavior. For deeper theoretical backing on these interactions, refer to the All About Circuits guide on Series Resonance.

Failure Mode Contrast: What Breaks at the Extremes

Understanding how series and parallel topologies fail is critical for designing protection circuits and debugging dead boards. A component failure in a series circuit yields vastly different symptoms than the same failure in a parallel tank.

Series RLC Failure Modes

• Capacitor Shorts: The DC blocking capability is lost. The circuit degrades into an RL lowpass filter. High-frequency resonance is destroyed, and DC voltage will pass directly to the load.
• Inductor Opens: The signal path is broken. The circuit becomes completely dead (0V output at all frequencies).
• Resistor Opens: Same as inductor open; the ground return path is severed. Output is 0V.

Parallel RLC Failure Modes (The Contrast)

• Capacitor Shorts: Critical Hazard. In a parallel tank tied across a signal line to ground, a shorted capacitor creates a dead short to ground. This will blow the source fuse, trigger overcurrent protection, or destroy the driving op-amp.
• Inductor Opens: The inductive reactance is removed. The circuit degrades into an RC lowpass filter. Unlike the series open, the signal path is not broken, but the notch/bandstop behavior is lost.
• Resistor Opens (in parallel damping): The Q-factor spikes uncontrollably. The circuit becomes a high-Q ringing tank, causing severe overshoot and oscillation on the edges of any transient signal.

Breadboard Testing Step-by-Step

Simulations assume ideal components. Breadboards introduce parasitic capacitance (typically 2-5 pF per row) and lead inductance. Follow this procedure to validate your 100 kHz design on the bench. For more on how parasitics affect high-frequency passive circuits, review DigiKey's technical breakdown on capacitor dielectrics and parasitics.

1. Component Placement: Insert the 1 nF C0G capacitor, 2.5 mH inductor, and 150 Ω resistor in a continuous series chain on the breadboard. Keep the physical distance between component leads as short as possible to minimize stray series inductance.
2. Source Connection: Connect your function generator's output to Node 1 ($V_{in}$). Set the generator to output a 100 kHz sine wave, 2.0 Vpp amplitude, with a 50 Ω output impedance enabled. Do not exceed 5 Vpp; high voltages can saturate the 2.5 mH ferrite core, dropping its inductance and shifting $f_r$ upward.
3. Scope Probing: Connect Channel 1 of your oscilloscope to Node 1 (to monitor the actual input) and Channel 2 to Node 3 ($V_{out}$). Crucial: Use 10x attenuation probes. A 1x probe adds ~100 pF of capacitance to Node 3, which will parallel your 150 Ω resistor and completely skew your high-frequency roll-off measurements.
4. Frequency Sweep: Enable the sweep function on your generator. Sweep from 10 kHz to 500 kHz over 10 seconds. Observe Channel 2. You should see the amplitude peak sharply around the 100 kHz mark.
5. Measure the -3dB Bandwidth: Pause the sweep at the exact peak frequency (e.g., 100.6 kHz). Note the peak-to-peak voltage (e.g., 2.0 Vpp). Calculate 70.7% of that value (1.414 Vpp). Sweep left and right of the peak to find the exact frequencies where the output drops to 1.414 Vpp. The difference between these two frequencies is your actual -3dB bandwidth. It should measure close to 10 kHz.

Final Verification and Edge Cases

If your measured bandwidth is wider than 10 kHz, your inductor likely has a low intrinsic Q (high internal DC resistance, or DCR). Check the datasheet for the Wurth 744043250; its DCR is roughly 3.5 Ω. While 3.5 Ω is small compared to our 150 Ω load, if you were designing for a Q of 50 (using a 31 Ω resistor), that 3.5 Ω DCR would consume over 10% of your total resistance, severely degrading your peak amplitude.

If your resonance peak is shifted lower than 100 kHz, you are likely a victim of breadboard parasitics or scope probe loading. Move the circuit to a copper-clad perfboard with point-to-point wiring to eliminate the 5 pF of stray breadboard capacitance, which effectively adds to your 1 nF capacitor and drags the math down.

By locking in the Series RLC topology, strictly enforcing C0G dielectrics, and accounting for probe parasitics during validation, you guarantee a filter that performs on the bench exactly as it does in the SPICE simulation.