To calculate capacitance in series, use the reciprocal formula: the total capacitance is always less than the smallest individual capacitor in the chain. For two capacitors, the shortcut is (C1 × C2) / (C1 + C2). If you place two identical 1µF capacitors in series, the total capacitance drops to exactly 0.5µF, while the DC voltage rating theoretically doubles. This topology is the standard engineering solution when your circuit voltage exceeds the maximum rating of commercially available, cost-effective capacitors.
The Core Formula and Node Topology
Unlike resistors in series (which add up), capacitors in series divide. The physical reason is straightforward: placing capacitors in series increases the effective distance between the outermost plates (the dielectric thickness adds up), and capacitance is inversely proportional to plate distance.
The universal formula for n capacitors is:
1 / C_total = (1 / C1) + (1 / C2) + ... + (1 / Cn)
Topology and Node Labels
Consider a basic two-capacitor series string driven by a DC voltage source:
- Node A (V_in): The positive DC bus connection.
- C1: The first capacitor, connected between Node A and Node B.
- Node B (V_mid): The floating midpoint junction between C1 and C2.
- C2: The second capacitor, connected between Node B and Node C.
- Node C (GND): The ground or negative DC bus return.
In an ideal AC circuit, the AC voltage drops across C1 and C2 inversely proportional to their capacitance (the smaller capacitor drops more voltage). However, in a DC or mixed-signal circuit, the DC voltage division is dictated entirely by the leakage resistance of the capacitors, not their capacitance. This distinction is the root cause of most high-voltage capacitor failures in hobbyist and prosumer designs.
Decision Tree: Series vs. Parallel vs. Single
Before you wire up a chain of capacitors, verify that series is actually the correct topology for your constraint. Use this decision matrix to lock in your configuration.
| Design Constraint | Choose Topology | Why This Wins |
|---|---|---|
| V_bus exceeds max V_rating of available caps | Series | Stacks voltage ratings; prevents dielectric breakdown. |
| Need higher total µF for ripple filtering at low V | Parallel | Capacitance adds directly (C1 + C2); lowers ESR. |
| Need precise, low-tolerance timing or snubber value | Series | Divides capacitance to achieve non-standard low values (e.g., two 100nF in series = 50nF). |
| High ripple current handling required | Parallel | Splits RMS ripple current across multiple components, reducing thermal stress. |
| Space is severely limited on the PCB | Single | Series/parallel arrays consume excess board real estate and add parasitic trace inductance. |
The Verdict: Choose series exclusively when you are voltage-constrained or need to synthesize a smaller, precise capacitance value. Choose parallel when you are current-constrained or need bulk energy storage.
Design Walkthrough: 600V DC Bus Snubber Network
Let’s design a DC link snubber for a variable frequency drive (VFD) operating on a 600V DC bus. We need a total snubber capacitance of 0.5µF to suppress high-frequency switching transients from the IGBTs. Standard 0.5µF film capacitors rated for 800V+ are physically massive and cost upwards of $45 each. Instead, we will calculate capacitance in series using cheaper, smaller components.
Component Selection
We select the WIMA MKP10 1µF 400VDC polypropylene film capacitor (Mouser part: 505-MKP10.1/400). They cost about $3.50 each. Placing two 1µF caps in series yields our target 0.5µF. The theoretical voltage rating is 400V + 400V = 800V, giving us a comfortable safety margin over the 600V bus.
If you wire C1 and C2 in series and apply 600V DC, the voltage will not split evenly to 300V/300V. Because of manufacturing variances in the dielectric, C1 might have a leakage resistance of 500MΩ while C2 has 1500MΩ. The 600V will divide proportionally to those resistances, dumping 450V across C1. C1 is only rated for 400V, so its dielectric will puncture, short out, and subsequently dump the full 600V onto C2, causing a catastrophic cascade failure.
The Fix: You must place high-value 'bleeder' or 'balancing' resistors in parallel with each capacitor to force the voltage to divide evenly. The current through the resistor should be at least 10x the worst-case capacitor leakage current. For the WIMA MKP10, a 220kΩ, 1W metal film resistor across each capacitor draws ~1.3mA at 300V, easily overpowering the microamp-level leakage current and locking the midpoint voltage to exactly 300V.
Final Bill of Materials (BOM)
- 2x WIMA MKP10 1µF 400VDC Film Capacitors
- 2x 220kΩ 1W Axial Metal Film Resistors (e.g., Vishay PR01 series)
Failure Mode Contrast: What Breaks at the Extremes?
Understanding how a circuit behaves when a component fails is just as important as knowing how to calculate capacitance in series under ideal conditions. Here is the failure-mode contrast between series and parallel topologies.
| Failure Event | Series Topology Impact | Parallel Topology Impact |
|---|---|---|
| C1 Fails OPEN | C_total drops to 0µF. The entire circuit path is broken. Snubber or filter becomes completely inactive. | C_total drops slightly (loses C1 value). Circuit continues to operate with reduced bulk capacitance and higher ripple. |
| C1 Fails SHORT | C_total becomes equal to C2. The voltage rating of the string is instantly halved. C2 will likely overvoltage and fail shortly after. | Dead short across the entire power bus. Blows the main upstream fuse or triggers the power supply crowbar protection immediately. |
| C1 Drifts -20% (Aging) | C_total decreases slightly. In AC applications, the voltage drop across C1 increases, potentially pushing it closer to its V_max limit. | C_total decreases slightly. Minimal impact on voltage distribution; ripple current redistributes naturally. |
Key Takeaway: Series strings are highly vulnerable to open-circuit failures (which kill the whole node) and short-circuit failures (which cause cascade overvoltage). Parallel banks are highly vulnerable to short-circuit failures (which kill the whole bus). Always use fuses or thermal cutoffs appropriate to the topology.
Step-by-Step Breadboard Verification Protocol
Before soldering your series string into a high-voltage PCB, validate the assembly on the bench using a low-voltage test. Never apply the full 600V bus during initial prototyping.
- Assemble the String: Insert the two 1µF capacitors into a solderless breadboard in series. Insert the 220kΩ balancing resistors in parallel with each capacitor.
- Verify Baseline Capacitance: Use a benchtop LCR meter (like the Uni-Trend UT612) set to 100Hz. Place the probes across Node A and Node C. The meter should read ~0.5µF. If it reads 1µF, you have wired them in parallel. If it reads OL (open), check your breadboard contacts.
- Apply Low-Voltage DC: Connect a bench power supply set to 30V DC across Node A (positive) and Node C (negative).
- Measure DC Voltage Division: Using a 6.5-digit multimeter, measure the voltage from Node A to Node B, and then Node B to Node C. Both readings should be 15.0V DC (±0.2V).
- Test the Extremes: Disconnect the power supply. Remove one of the 220kΩ resistors to simulate a missing balancing component. Reapply 30V. You will immediately see the voltage division skew (e.g., 22V and 8V) based on the natural leakage mismatch of the film capacitors. This proves why the resistors are non-negotiable.
- Discharge Protocol: Turn off the supply. The 220kΩ resistors will bleed the 30V down to safe levels in roughly 1 second (Time constant τ = R_eq × C_total). Verify 0V with your multimeter before touching the nodes.
The Default Recommendation
If you are designing a high-voltage DC filter, snubber, or pulse-forming network and need to stack capacitors, do not rely on the natural voltage sharing of the dielectrics.
The Default Pick: Always use metallized polypropylene (MKP) film capacitors (like the WIMA MKP10 or EPCOS/TDK B326 series) rather than ceramic (MLCC) or aluminum electrolytic capacitors for series stacking. MKP film caps exhibit highly stable, predictable leakage currents and virtually zero dielectric absorption compared to ceramics. Pair them with metal film balancing resistors sized to draw 1mA to 5mA at the nominal divided voltage. Calculate capacitance in series using the reciprocal formula, derate the total string voltage by 20% from the theoretical maximum, and you will have a bulletproof high-voltage node that passes both bench validation and long-term thermal aging.
For deeper reading on AC vs DC voltage division in reactive components, refer to the capacitor series network guides at Electronics Tutorials.
