When you encounter a mixed series-parallel electrical schematic diagram example on an exam or in a design review, the biggest mistake is rushing to apply Ohm's Law before simplifying the network. In this walkthrough, we will dissect a classic DC circuit problem. We will identify the correct theorems, execute every algebraic step without skipping the messy fractions, and run independent sanity checks to prove the math holds up to Kirchhoff's laws.
The Problem Statement: Mixed Series-Parallel DC Circuit
Problem Statement:
Analyze the following electrical schematic diagram example: A 24V DC ideal voltage source ($V_T$) is connected in series with a $4\Omega$ resistor ($R_1$). After $R_1$, the circuit splits into two parallel branches. The first branch contains a $12\Omega$ resistor ($R_2$), and the second branch contains a $6\Omega$ resistor ($R_3$). The branches recombine and return to the negative terminal of the source.
Find:
- Total equivalent resistance ($R_{eq}$) of the entire circuit.
- Total current ($I_T$) drawn from the 24V source.
- The voltage drop across the parallel bank ($V_{parallel}$).
- The individual branch currents ($I_{R2}$ and $I_{R3}$).
Step-by-Step Solution and Algebra
Which theorem/method applies and why? We must use Series-Parallel Network Reduction combined with Ohm's Law. We cannot apply Ohm's Law directly to the source and $R_2$ because $R_2$ is not in series with the source; it shares a node with $R_3$. We must first collapse the parallel bank into a single equivalent resistor, creating a simple series circuit.
Step 1: Calculate the Parallel Equivalent Resistance ($R_p$)
Resistors $R_2$ and $R_3$ are in parallel. The formula for two parallel resistors is the product-over-sum method:
$R_p = \frac{R_2 \times R_3}{R_2 + R_3}$
Substitute the known values:
$R_p = \frac{12 \times 6}{12 + 6}$
$R_p = \frac{72}{18}$
$R_p = 4\Omega$
Step 2: Calculate Total Equivalent Resistance ($R_{eq}$)
Now, the circuit is a simple series loop consisting of $R_1$ and our new equivalent resistor $R_p$.
$R_{eq} = R_1 + R_p$
$R_{eq} = 4\Omega + 4\Omega$
$R_{eq} = 8\Omega$
Step 3: Calculate Total Current ($I_T$)
Apply Ohm's Law to the entire circuit using the source voltage and total resistance.
$I_T = \frac{V_T}{R_{eq}}$
$I_T = \frac{24V}{8\Omega}$
$I_T = 3A$
Step 4: Calculate Voltage Drops
First, find the voltage dropped across the series resistor $R_1$:
$V_{R1} = I_T \times R_1 = 3A \times 4\Omega = 12V$
Next, find the voltage across the parallel bank. By Kirchhoff's Voltage Law (KVL), the sum of voltage drops in a series loop equals the source voltage:
$V_{parallel} = V_T - V_{R1}$
$V_{parallel} = 24V - 12V = 12V$
Step 5: Calculate Branch Currents
Because $R_2$ and $R_3$ are in parallel, they both experience the exact same voltage ($V_{parallel} = 12V$). Apply Ohm's Law to each branch individually:
$I_{R2} = \frac{V_{parallel}}{R_2} = \frac{12V}{12\Omega} = 1A$
$I_{R3} = \frac{V_{parallel}}{R_3} = \frac{12V}{6\Omega} = 2A$
The Trap, Sanity Checks, and Independent Verification
⚠️ The Trap in This Problem:
The most common error students make when analyzing this electrical schematic diagram example is assuming the full 24V source is applied directly across the parallel bank. If you skip Step 4 and calculate $I_{R2} = 24V / 12\Omega = 2A$, your entire downstream analysis will be wrong. Always remember that series components act as voltage dividers, starving downstream parallel branches of the full source voltage.
Answer Sanity Check (Order of Magnitude and Units)
Let's verify our answers using Kirchhoff's Current Law (KCL) at the node where the circuit splits. KCL states that the total current entering a node must equal the total current leaving it.
$I_{entering} = I_T = 3A$
$I_{leaving} = I_{R2} + I_{R3} = 1A + 2A = 3A$
The units are in Amperes, and the magnitude makes logical sense: the lower resistance branch ($6\Omega$) draws exactly twice the current of the higher resistance branch ($12\Omega$). The math is physically sound.
How to Verify the Answer Independently
To prove our $V_{parallel}$ calculation without relying on KVL subtraction, we can use the Voltage Divider Rule (VDR). The VDR allows us to calculate the voltage across any series component (or block of components) based on its ratio of the total resistance.
$V_{parallel} = V_T \times \left( \frac{R_p}{R_1 + R_p} \right)$
$V_{parallel} = 24V \times \left( \frac{4\Omega}{4\Omega + 4\Omega} \right)$
$V_{parallel} = 24V \times \left( \frac{4}{8} \right)$
$V_{parallel} = 24V \times 0.5 = 12V$
This independently confirms our previous KVL deduction. If your VDR calculation does not match your KVL subtraction, you have an algebra error in your equivalent resistance steps.
FAQ: Common Questions on Electrical Schematic Diagram Examples
How do I read an electrical schematic diagram example with multiple power sources?
When a schematic contains multiple DC sources, simple series-parallel reduction is no longer sufficient. You must upgrade your analysis method to Mesh Current Analysis (using Kirchhoff's Voltage Law around closed loops) or Nodal Voltage Analysis (using Kirchhoff's Current Law at principal nodes). Alternatively, you can use the Superposition Theorem, which involves turning off all sources except one (replacing voltage sources with short circuits and current sources with open circuits), solving the circuit, and then algebraically summing the results for each source. For a deep dive into these matrix methods, review standard circuit theory resources like Khan Academy's Circuits module.
What is the difference between a schematic diagram and a wiring diagram example?
An electrical schematic diagram example shows the logical flow of current and the electrical relationships between components using standardized symbols (like the IEEE/ANSI standard). It ignores physical layout. A wiring diagram (or connection diagram), on the other hand, shows the physical routing of wires, terminal block numbers, and actual spatial relationships. If you are debugging a PCB or calculating theoretical current, use the schematic. If you are pulling wire through conduit and landing connections on a contactor in a control panel, use the wiring diagram.
Why does my electrical schematic diagram example show ground symbols instead of return wires?
To reduce visual clutter, draftsmen use ground symbols (the three descending horizontal lines) to represent a common return path or equipotential node. In a DC circuit analysis context, all ground symbols are electrically connected to each other and to the negative terminal of the power supply. When you are mentally tracing the circuit or setting up your KVL loops, treat every ground symbol as if it were tied directly to the same physical wire. Ignoring this implicit connection is a frequent cause of "missing path" errors in exam problems.
How can I simulate an electrical schematic diagram example before building it?
Before committing to physical components or submitting an exam answer, you can verify your manual calculations using SPICE-based simulators. A highly accessible, browser-based tool is the Falstad Circuit Simulator. You can draw the exact schematic, assign your resistor values and DC voltage sources, and the simulator will animate the current flow while providing exact node voltages and branch currents. If your hand-calculated $I_{R3}$ is 2A, but Falstad shows 1.5A, you immediately know to re-check your parallel equivalent resistance algebra.






