For most audio, sensor, and hobbyist RF applications under 100kHz, the Cascaded 1st-Order Inverting Active Bandpass Filter using a general-purpose op-amp is the most practical default choice. While textbook Multiple Feedback (MFB) topologies offer steeper 2nd-order roll-offs in a single stage, they demand tightly matched components and are notoriously difficult to tune on a breadboard. The cascaded inverting topology avoids these pitfalls, providing predictable gain, easy corner-frequency tuning, and robust operation with standard E24 series components.

The Verdict: Which Bandpass Topology to Choose

Before picking components, you must select the right architecture for your signal chain. Here is the decision matrix for active bandpass filter circuits:

Topology Best For Component Matching Breadboard Tunability
Passive RC (Series) High-impedance inputs, RF None High (but suffers insertion loss)
Multiple Feedback (MFB) Space-constrained PCBs, Q < 10 Strict (1% or better) Low (interdependent equations)
State-Variable High-Q audio crossovers, Q > 10 Moderate Moderate (requires 3+ op-amps)
Cascaded 1st-Order Active Sensors, audio, general DIY None (independent corners) High (swap one R or C)
Decision Path:
  • If you need a Q-factor > 10 for a narrow notch/peak → Choose State-Variable.
  • If you are designing a final SMD PCB and need exactly 2nd-order Butterworth in minimal space → Choose MFB.
  • If you are prototyping, need gain, and want independent control over the high-pass and low-pass corners → Choose the Cascaded 1st-Order Active Topology (Default Pick).

Concrete Part Pick: Use the TL072 (JFET input, low noise for audio) or LM358 (cheap, works on single 5V-9V supplies, but has mild crossover distortion). For high-fidelity audio, upgrade to the OPA1612.

Topology Description and Node Labels

The cascaded inverting bandpass filter combines a passive high-pass RC network at the input with an active low-pass RC network in the feedback loop of an inverting op-amp. This yields a 1st-order high-pass slope (+20dB/decade) and a 1st-order low-pass slope (-20dB/decade), creating a 2nd-order bandpass response overall.

Node Definitions:

  • Node IN: Signal input from your source (e.g., microphone or sensor).
  • Node A (V-): The inverting input of the op-amp. This is the virtual ground summing junction.
  • Node B (V+): The non-inverting input. Tied to a DC bias voltage (VCC/2 for single-supply, or GND for dual-supply).
  • Node OUT: The op-amp output pin.

Component Behavior Matrix

Unlike MFB filters where changing one resistor shifts both the center frequency and the Q-factor, this topology isolates the variables:

Component Location Primary Effect When Value Increases Secondary Effect
C_in Node IN to Node A Lowers the high-pass cutoff frequency (f_L) Increases low-frequency phase shift
R_in Node A to GND/Bias Lowers f_L and reduces midband gain Increases input impedance slightly
R_f Node OUT to Node A Increases midband gain Lowers the low-pass cutoff frequency (f_H)
C_f Parallel with R_f Lowers f_H (narrows the passband from the top) Reduces high-frequency noise/oscillation

Design Walkthrough: Picking Real Component Values for a 1kHz Audio Filter

Let’s design a bandpass filter for an acoustic sensor. We need a passband roughly from 300Hz to 3kHz (centering around 1kHz for human voice), with a midband voltage gain of 10 (20dB). We are using a single 9V battery supply, so we must bias Node B to 4.5V.

Step 1: Set the High-Pass Corner (f_L = 300Hz)

The high-pass cutoff is determined by C_in and R_in. The formula is:

f_L = 1 / (2 × π × R_in × C_in)

  • Pick a standard capacitor value first to avoid impractical resistor sizes. Let’s choose C_in = 100nF (a standard X7R ceramic).
  • Calculate R_in: R_in = 1 / (2 × π × 300 × 100e-9) = 5,305 Ω
  • Select the nearest E24 standard resistor: R_in = 5.1kΩ.
  • Actual f_L: 312Hz. Perfectly acceptable.

Step 2: Set the Gain and Low-Pass Corner (f_H = 3kHz)

The midband gain is -R_f / R_in. We want a gain of 10.

  • R_f = 10 × 5.1kΩ = 51kΩ. (This is a perfect E24 value).

The low-pass cutoff is determined by R_f and C_f:

f_H = 1 / (2 × π × R_f × C_f)

  • Calculate C_f: C_f = 1 / (2 × π × 51,000 × 3000) = 1.04nF
  • Select the nearest standard capacitor: C_f = 1nF.
  • Actual f_H: 3.12kHz.
Parasitic Warning: Never design C_f to be smaller than 100pF on a breadboard. Breadboard stray capacitance between adjacent rows is typically 2pF to 5pF. If your math calls for a 10pF capacitor, your actual cutoff will be severely skewed by the breadboard’s parasitics. Sticking to 1nF or higher for C_f guarantees your physical build matches your schematic.

Step 3: Single-Supply Biasing (Node B)

Because we are using a 9V single supply, the op-amp cannot output negative voltages. We must create a virtual ground at 4.5V.

  • Use two 10kΩ resistors in series from 9V to GND. The midpoint is Node B.
  • Add a 10µF decoupling capacitor from Node B to GND to keep the bias rail quiet.
  • Tie R_in to this 4.5V bias node instead of hard GND.

Breadboard Testing: Step-by-Step Verification

Do not just wire it up and hope for the best. Follow this verification sequence to isolate DC bias errors from AC filtering errors.

  1. Power and Bias Check (No Signal): Power the board with 9V. Use a multimeter to probe Node B (V+). It must read exactly 4.5V (±0.1V). Probe Node OUT. It should also read ~4.5V. If Node OUT is pegged at 0V or 9V, your op-amp is latched or wired incorrectly.
  2. DC Injection Test: Temporarily short C_in (bypass the high-pass). Inject a 1V DC offset from your power supply into Node IN. The output should read 4.5V - (1V × 10) = -5.5V relative to ground, but since it’s single supply, it will clip at 0V. Remove the short. This confirms the inverting gain path is active.
  3. AC Midband Verification: Connect a function generator to Node IN. Set it to a 1kHz sine wave, 100mV peak-to-peak. Connect an oscilloscope to Node OUT. You should see a 1V peak-to-peak sine wave (10x gain), inverted (180° out of phase) relative to the input.
  4. Sweep the Corners:
    • Drop the frequency to 312Hz. The output amplitude should drop to ~707mV (-3dB point).
    • Raise the frequency to 3.12kHz. The output amplitude should again drop to ~707mV.
    • Drop to 30Hz. The signal should be heavily attenuated (nearly flatline).

Failure Mode Contrast: What Breaks at the Extremes?

Understanding how components fail is critical for debugging. Unlike a simple passive series LC circuit where a short destroys the filter entirely, this active topology degrades gracefully or fails in highly specific ways.

Component Failure Mode Symptom on Oscilloscope Root Cause / Physics
C_in Shorted Massive DC offset at output; clips to 0V or 9V rail. Destroys the virtual ground; input DC bias floods Node A.
C_in Open Zero output signal (flatline at 4.5V DC). AC signal path is broken; no current reaches the summing junction.
R_in Open Output becomes extremely noisy; high-frequency oscillation. Op-amp operates open-loop at high frequencies; gain approaches infinity.
R_f Open Output clips to rail or oscillates wildly. Feedback loop broken; op-amp acts as an open-loop comparator.
C_f Shorted Zero AC output; acts as an integrator with infinite DC gain. Feedback impedance drops to zero at AC; gain becomes 0.
C_f Open Passband extends to infinity; high-frequency noise passes through. Low-pass corner is removed; circuit becomes a pure high-pass amplifier.

For deeper mathematical modeling of active filter responses and automated component selection, the Analog Devices Filter Wizard is an indispensable browser-based tool that calculates exact pole-zero placements. Additionally, Texas Instruments’ application notes on op-amp filter design provide exhaustive derivations for MFB and Sallen-Key variations if your project eventually requires steeper roll-off slopes on a custom PCB.

Final Rule: When prototyping any active bandpass filter circuit on a breadboard, always default to the cascaded inverting topology with 1% metal film resistors and C0G/NP0 ceramic capacitors for the feedback network. It guarantees that the physical circuit on your bench will behave exactly like the math on your screen, without the hidden parasitic traps that plague higher-order single-stage designs.