When you wire capacitors in series, the total capacitance decreases while the overall voltage rating increases. Specifically, the total capacitance is calculated using the reciprocal sum formula (identical to resistors in parallel), and the maximum working voltage becomes the sum of the individual voltage ratings. This topology is the standard engineering solution when a circuit requires a high DC bus voltage—such as an 800V VFD (Variable Frequency Drive) or a tube amplifier power supply—but single capacitors with that voltage rating are either physically massive, prohibitively expensive, or lack the necessary ripple current handling.

However, simply daisy-chaining capacitors is a guaranteed way to destroy them. Because no two electrolytic capacitors have identical internal leakage currents, voltage will not divide evenly across them. Without external balancing, the capacitor with the lowest leakage current will absorb a disproportionate share of the voltage, eventually exceeding its dielectric breakdown limit and failing catastrophically. This guide covers the exact node behavior, failure matrices, and a real-world design walkthrough using balancing networks to keep a series string stable.

The Series Topology: Nodes, Math, and Voltage Division

To understand the physics, picture a mechanical spring. A single thick spring compresses easily under a heavy load. If you cut that spring in half and stack the two halves end-to-end (in series), the combined assembly becomes much stiffer (lower capacitance) but can withstand a much higher total compressive force before bottoming out (higher voltage rating).

Consider a basic two-capacitor series string. We define three critical nodes:

  • Node A (High-Voltage Input): The positive terminal of Capacitor 1 (C1).
  • Node B (Midpoint): The electrical junction where the negative terminal of C1 connects to the positive terminal of Capacitor 2 (C2).
  • Node C (Ground/Return): The negative terminal of C2.

The total capacitance ($C_{total}$) for two capacitors is calculated as:

C_total = (C1 × C2) / (C1 + C2)

If C1 and C2 are both 470µF, the resulting series capacitance is exactly 235µF. The voltage rating, assuming both are rated for 400VDC, theoretically becomes 800VDC. But the voltage division at Node B is dictated by the capacitive reactance and, more importantly in DC applications, the leakage current. According to Electronics Tutorials, in a purely ideal AC circuit, voltage divides inversely to capacitance. In a real-world DC bus, leakage current dominates the steady-state voltage distribution.

Safety Warning: Series capacitor strings in DC bus applications store lethal energy. Even after power is removed, if one capacitor discharges faster than the other, Node B can retain a hazardous potential difference relative to ground. Always use bleeder resistors and verify all nodes with a CAT III/IV multimeter before touching the circuit.

Behavior Matrix and Extreme Failure Modes

Understanding how a series string reacts to component drift or catastrophic failure is critical for designing protective circuitry. The table below maps the exact electrical behavior at Node B and the overall string when specific parameters change.

Condition / Element Change Effect on Total Capacitance Effect on Node B Voltage (Midpoint) System Consequence & Failure Mode
C1 and C2 perfectly matched (Ideal) Halved (e.g., 470µF → 235µF) Exactly 50% of V_total Optimal operation. Voltage stress is equally shared.
C1 leakage current increases (Aging/Heat) Unchanged Node B voltage drops below 50% C2 absorbs >50% of V_total. C2 approaches overvoltage condition and risks dielectric breakdown.
C1 fails OPEN (Internal bond wire snaps) Drops to 0µF (Open Circuit) Floats / Undefined DC bus filtering is lost entirely. Ripple voltage spikes, potentially destroying downstream switching transistors (IGBTs/MOSFETs).
C1 fails SHORT (Dielectric puncture) Equals C2 (e.g., 470µF) Node B pulls to Node A (V_total) Full V_total (e.g., 800V) is applied directly across C2. C2 experiences massive overvoltage, leading to thermal runaway, venting, or explosion within milliseconds.
Balancing Resistor on C1 opens Unchanged Drifts based on natural leakage mismatch Latent fault. String operates normally until leakage mismatch pushes one capacitor past its rated voltage over hours/days.

The short-circuit failure mode is the most dangerous. If a single capacitor in a high-voltage string shorts out, the remaining capacitors instantly inherit the entire bus voltage. This cascading failure is why series strings are almost exclusively used in applications where the designer can guarantee voltage balancing and overvoltage clamping, or where the source impedance limits the fault current.

Design Walkthrough: 800V DC Bus Filter Using 400V Parts

Let us design a primary DC bus filter for a 575VAC input VFD. The rectified DC bus voltage will peak around 815VDC. Sourcing a single 900V or 1000V aluminum electrolytic capacitor with adequate ripple current rating is difficult; they are typically custom-order, screw-terminal cans costing upwards of $150 each. Instead, we will wire two standard, off-the-shelf 400V snap-in capacitors in series.

Component Selection:

  • Capacitors: 2x Cornell Dubilier 381LX471M400A052 (470µF, 400V, 105°C, 35x50mm snap-in). Cost: ~$9.00 each.
  • Target Spec: ~235µF total capacitance, 800VDC working voltage.

The Balancing Network Calculation:
As noted in the Cornell Dubilier Application Guide, aluminum electrolytic capacitors exhibit significant leakage current variance, especially during the first few hours of operation or after long storage. To force the voltage to divide evenly at Node B, we parallel a high-value resistor across each capacitor. These resistors must draw enough current to 'swamp' the differences in capacitor leakage current.

A standard engineering rule of thumb for bleeder/balancing resistors is to select a resistance value that draws at least 3 to 5 times the maximum expected leakage current of the capacitor. The CDE 381LX471M400A052 has a specified leakage current of roughly 1.3mA after 2 minutes. To safely swamp this, we want a resistor current of at least 4mA at the maximum voltage across a single cap (400V).

R = V / I = 400V / 0.004A = 100,000 Ω (100kΩ)

Power Dissipation Check:
P = V² / R = 400² / 100,000 = 1.6 Watts

We will select 100kΩ, 3-Watt metal oxide film resistors (e.g., Vishay PR03 series) for each capacitor. The 3W rating provides a safe thermal margin above the 1.6W continuous dissipation. We solder one 100kΩ resistor directly across the terminals of C1, and another across C2. This creates a rigid voltage divider that holds Node B at exactly 50% of the total bus voltage, regardless of the internal chemical state of the capacitors.

Pro-Tip on Physical Layout: When wiring snap-in capacitors in series, keep the physical leads between Node A, Node B, and Node C as short and symmetrical as possible. Asymmetrical trace lengths introduce parasitic inductance (ESL) differences, which can cause high-frequency ringing to distribute unevenly during fast IGBT switching transients.

Bench Testing: Verifying the Series String at 24V

You cannot safely prototype an 800V string on a standard solderless breadboard, nor should you apply full high voltage until the balancing network is verified. To prove the topology and measure the voltage division behavior, we build a scaled-down, low-voltage analog on the bench using a standard DC power supply.

Prototype Materials:

  • 2x 1000µF 16V Aluminum Electrolytic Capacitors
  • 2x 10kΩ 1/4W Resistors (Balancing network)
  • Adjustable DC Bench Power Supply (set to 24V)
  • True-RMS Digital Multimeter (e.g., Fluke 87V)

Step-by-Step Verification Procedure:

  1. Pre-Check: Set your multimeter to capacitance mode. Measure C1 and C2 individually. Record the values (e.g., C1 = 1040µF, C2 = 980µF). Note the 6% variance, which is typical for 20% tolerance parts.
  2. Assembly: Solder C1 and C2 in series on a piece of perfboard. Solder the 10kΩ resistors directly across the respective capacitor pins. Do not use a solderless breadboard for the final high-current or high-voltage test, as contact resistance can skew low-voltage leakage measurements.
  3. Initial Power-Up: Set the bench supply to 0V. Connect the supply positive to Node A and negative to Node C. Slowly ramp the voltage up to 24V. The series string should draw roughly 2.4mA total through the balancing resistors.
  4. Midpoint Measurement: Set the multimeter to DC Volts. Place the black probe on Node C (Ground) and the red probe on Node B (Midpoint). Read the voltage.
  5. Analyze the Data: With 24V applied, an ideal string reads 12.00V at Node B. Because C1 and C2 have slightly different capacitances and leakage profiles, you will likely read something between 11.2V and 12.8V. If the balancing resistors are correctly swamping the leakage, the voltage will stabilize within 5% of the ideal 12V midpoint. If you see 18V on one cap and 6V on the other, your balancing resistors are too large (too high resistance) and are failing to overcome the leakage mismatch.
  6. Discharge Verification: Turn off the bench supply. Keep the multimeter probes on Node B and Node C. Watch the voltage decay. The 10kΩ resistors should discharge the 24V string to below 1V within roughly 5 seconds ($5 \times R_{total} \times C_{total}$). This confirms the bleeder network is functional and will safely discharge the high-voltage string in the final application.

By validating the voltage division and discharge timing at 24V, you confirm the mathematical model of your balancing network. For deeper insights into the thermal and aging effects on series-connected aluminum electrolytics, refer to the Vishay Technical Note on Series Connection of Capacitors, which details how leakage current equalization shifts over thousands of hours of operational life.