To keep a TO-220 power transistor dissipating 10W under 125°C in a 50°C enclosure, you need a heatsink with a sink-to-ambient thermal resistance ($R_{\theta SA}$) of ≤ 5.08 °C/W and a 10kΩ NTC thermistor as a temperature sensor to trigger a software shutdown at 110°C. Abstract thermal theory won't save your silicon; exact math and the right feedback loop will. Here is the bench-tested framework for sizing your thermal path, picking the right extruded aluminum sink, and wiring an NTC sensor to an ESP32 for active protection.

Safety Warning: Thermal runaway in high-current linear circuits can cause component packages to rupture or vent toxic smoke. Always test high-power thermal designs with a current-limited bench supply and keep a Class C fire extinguisher nearby. Never bypass thermal shutdown logic in firmware.

The Thermal Path: Calculating Junction-to-Ambient Limits

Heat flows from the silicon junction to the ambient air through three distinct thermal resistances, measured in °C/W. Think of it like a series circuit where temperature is voltage and heat (watts) is current. The governing equation is:

T_J = T_A + P_D × (R_θJC + R_θCS + R_θSA)

  • $T_J$ (Junction Temp): The silicon core temperature. We target 125°C for reliability, though absolute max is often 150°C.
  • $T_A$ (Ambient Temp): The air inside your enclosure. Assume 50°C for a sealed box in a warm room.
  • $P_D$ (Power Dissipation): The heat generated. Let's use 10W (e.g., a TIP120 Darlington transistor dropping 2V at 5A).
  • $R_{\theta JC}$ (Junction-to-Case): Fixed by the silicon manufacturer. For a TO-220 TIP120, this is 1.92 °C/W.
  • $R_{\theta CS}$ (Case-to-Sink): The thermal interface material (TIM). A standard silicone thermal paste layer yields ~0.5 °C/W.
  • $R_{\theta SA}$ (Sink-to-Ambient): The heatsink's efficiency. This is the variable we must solve for.

Plugging in our target numbers to find the maximum allowable heatsink resistance:

125 = 50 + 10 × (1.92 + 0.5 + R_θSA)
75 = 10 × (2.42 + R_θSA)
7.5 = 2.42 + R_θSA
R_θSA = 5.08 °C/W

Any heatsink with an $R_{\theta SA}$ of 5.08 °C/W or lower will keep the junction under 125°C. For a deeper dive into the physics of these interfaces, refer to this comprehensive guide on thermal resistance from All About Circuits.

Derating Curves and Heatsink Selection

Before buying a heatsink, you must interpret the component's Safe Operating Area (SOA) and power derating curve. The TIP120 datasheet shows a linear derating slope starting at 25°C case temperature. It can dissipate 75W at 25°C, but the limit drops by 0.5W for every 1°C increase, hitting 0W at 175°C. If your enclosure ambient is 50°C, the absolute maximum power the bare package can handle without a sink is roughly 2.5W before the junction hits its limit. Since we are pushing 10W, the heatsink is mandatory.

For our calculated 5.08 °C/W requirement, the Wakefield-Vette 640K is an ideal off-the-shelf pick. It is a black-anodized extruded aluminum TO-220 board-level heatsink rated at roughly 4.5 °C/W in natural convection. This gives us a 0.58 °C/W safety margin.

Enclosure Airflow Adjustments: If you seal this assembly inside a poorly ventilated IP65 enclosure, $T_A$ will rise, and natural convection will stall, effectively increasing the heatsink's $R_{\theta SA}$ by up to 30%. Adding a 30mm 5V brushless fan (like the Sunon MF30101VX) blowing across the fins forces convection, dropping the Wakefield 640K's effective thermal resistance to roughly 2.0 °C/W, buying you massive thermal headroom.

Deploying a Thermistor as a Temperature Sensor

Passive heatsinking only handles steady-state loads. For dynamic loads or fan failures, you need active firmware protection. Using a thermistor as a temperature sensor is the most cost-effective and electrically quiet method for embedded systems.

We will use the Vishay NTCLE100E3103JB0, a 10kΩ ±5% NTC (Negative Temperature Coefficient) thermistor with a B-value of 3977K. Its epoxy coating is rated to 125°C, and its leads can be bent flat against the heatsink.

Placement and Wiring

Do not measure the ambient air; measure the metal. Use a dab of high-temp thermal epoxy (like Arctic Silver Thermal Adhesive) to bond the thermistor's bead directly to the outermost fin of the Wakefield 640K, as close to the transistor tab as possible.

Wire the thermistor in a voltage divider configuration for the ESP32's 12-bit ADC:

  • Connect one thermistor lead to ESP32 GPIO 34 (ADC1_CH6).
  • Connect the same junction to a 10kΩ 1% precision pull-up resistor tied to the ESP32's 3.3V rail.
  • Connect the other thermistor lead to GND.

As the heatsink warms, the NTC resistance drops, pulling the ADC voltage down. At 25°C, the thermistor is 10kΩ, yielding 1.65V. At 100°C, it drops to roughly 830Ω, yielding ~0.25V. Use the Steinhart-Hart equation in your C++ firmware to convert the ADC reading into a precise Celsius value, triggering a hardware interrupt to cut the gate drive if the sink exceeds 110°C.

Failure Signatures: How Hot is Too Hot?

Pushing silicon to its absolute maximum $T_J$ (usually 150°C or 175°C) is a reliability death sentence. Here is what physically happens when thermal limits are breached:

Temperature ThresholdPhysical Failure SignatureSystem Symptom
125°C - 135°CEpoxy $T_g$ (Glass Transition) exceeded. Potting compounds and transistor encapsulants soften and outgas.Mechanical delamination; moisture ingress begins; parameter drift.
140°C - 150°CSilicon intrinsic carrier concentration spikes. Leakage current ($I_{CBO}$) multiplies exponentially.Thermal runaway. The part draws more current as it gets hotter, accelerating its own destruction.
> 160°CSolder reflow temperatures approached. Wire bonds inside the TO-220 package expand and shear.Catastrophic open-circuit or short-circuit; magic smoke; package rupture.

For long-term embedded deployments, design your thermal cutoff at 110°C (measured at the sink) to ensure the junction never crosses 125°C, accounting for the $R_{\theta JC}$ gradient.

Decision Tree: Sizing Your Thermal Management System

Stop guessing heatsink sizes. Use this decision matrix based on your calculated steady-state power dissipation ($P_D$) to select the exact hardware and sensor topology. For further reading on NTC thermistor math, consult the Vishay NTC introduction application note.

Power Dissipation ($P_D$)Thermal StrategyConcrete Hardware Pick
< 1.0WPCB Copper Pour. No discrete sink needed. Use thermal vias to inner ground planes.Standard 2oz copper PCB layout; no sensor required.
1.0W to 5.0WStamp Heatsink. Low-profile stamped metal for basic convection.Aavid 577202B00000G (TO-220 stamp, ~12 °C/W).
5.0W to 15.0WExtruded Sink + Passive NTC Monitoring. Requires calculated $R_{\theta SA}$ and firmware cutoff.Wakefield-Vette 640K sink + Vishay NTCLE100E3103JB0 thermistor as a temperature sensor.
> 15.0WActive Forced Convection + DPAK/TO-247. TO-220 leads will melt at these currents.Upgrade to TO-247 package + Sunon MF30101VX 30mm fan + PWM fan control via ESP32.

If your math lands you in the 5W to 15W bracket, order the Wakefield 640K and the Vishay 10k NTC. Epoxing that thermistor to the fin and reading it via an ESP32 ADC is the definitive, low-cost way to guarantee your power stage survives a stalled motor or a blocked ventilation vent.