If you are reading a 1.65V DC signal using a 12-bit successive approximation ADC converter with a 3.3V reference (like the internal SAR ADC on an ESP32), the direct converted digital value is 2048. This assumes a stable reference voltage (Vref) and a fully charged internal sample-and-hold capacitor. The exact formula used to derive this is: Digital Count = (Vin / Vref) × (2^n - 1). Substituting our bench values: (1.65V / 3.3V) × (4095) = 2047.5, which the microcontroller rounds to 2048.
The Core Conversion: Voltage to Digital Counts
Before we scale up to complex sensor arrays, here is how the digital output shifts across a ±20% range around our 1.65V baseline on a standard 12-bit, 3.3V SAR ADC. This is the exact lookup table you should tape to your bench when debugging a voltage divider network.
| Analog Input (Vin) | % of Vref (3.3V) | 12-Bit Digital Count | Expected Hex Value |
|---|---|---|---|
| 1.320V | 40% | 1638 | 0x666 |
| 1.485V | 45% | 1843 | 0x733 |
| 1.650V | 50% | 2048 | 0x800 |
| 1.815V | 55% | 2252 | 0x8CC |
| 1.980V | 60% | 2457 | 0x999 |
The resolution of your successive approximation ADC converter dictates the smallest voltage change it can detect, known as the Least Significant Bit (LSB) voltage step. Below is a data-dense reference for the most common microcontroller ADC configurations used in embedded projects today.
| ADC Resolution | Total Steps | Vref = 5.0V (Arduino Uno) | Vref = 3.3V (ESP32) | Vref = 2.048V (Precision External) |
|---|---|---|---|---|
| 10-bit | 1024 | 4.88 mV / step | 3.22 mV / step | 2.00 mV / step |
| 12-bit | 4096 | 1.22 mV / step | 0.80 mV / step | 0.50 mV / step |
| 16-bit (External SAR) | 65536 | 76.29 µV / step | 50.35 µV / step | 31.25 µV / step |
Scaling Mains AC: 120V vs 230V vs 3-Phase
A common point of failure for hobbyists is attempting to feed mains AC directly into a microcontroller. A successive approximation ADC converter only reads positive DC voltages (typically 0V to Vref). To measure AC mains, you must step down the voltage, rectify or bias it, and scale it to fit the ADC window. Here is how the math and hardware shift across global mains standards:
- 120V RMS (North America): Peak voltage is ~170V. Using a standard ZMPT101B voltage transformer module, you scale this down to a 0-3.3V AC signal, then add a 1.65V DC bias using a voltage divider. The ADC reads values oscillating around 2048. You must sample at least 1,000 times per second to accurately reconstruct the 60Hz sine wave via RMS calculation.
- 230V RMS (EU/UK/AU): Peak voltage is ~325V. The ZMPT101B module has a multi-turn potentiometer to adjust the step-down ratio. You must recalibrate the physical trim pot so the biased output still oscillates strictly between 0.2V and 3.1V (avoiding the non-linear rails of the ESP32 ADC). The digital counts will still center around 2048, but the physical scaling ratio changes from roughly 1000:1 to 2000:1.
- 3-Phase Power: You cannot use a single ADC channel with a multiplexer for 3-phase measurement without risking catastrophic ground loops and destroying your microcontroller. You must use three physically isolated voltage sensors (like three separate ZMPT101B modules or isolated Hall-effect voltage transducers like the LV 25-P). Each sensor feeds a dedicated ADC pin. The conversion math remains identical per phase, but you must track the 120-degree phase shift in software to calculate total real power (kW) accurately.
When the Conversion is Meaningless: SAR ADC Gotchas
Knowing the formula is useless if the hardware violates the SAR architecture's physical requirements. According to the All About Circuits guide on SAR ADCs, the internal digital-to-analog converter (DAC) and comparator require a stable charge on the sample-and-hold capacitor to make accurate bit decisions. If that charge is compromised, your digital counts are just noise.
The internal 12-bit SAR ADC on the original ESP32 (WROOM-32) is notoriously non-linear. It clips prematurely around 3.1V (reading a flat 4095) and is highly noisy below 0.15V. If your application requires precision across the full 0-3.3V range, the raw
analogRead() conversion is meaningless. You must use the analogReadMilliVolts() function (which applies factory-stored eFuse calibration data) or switch to an external I2C ADC like the ADS1115.
Here is a direct comparison of the physical limits you must respect between the two most common maker microcontrollers:
| Parameter | ATmega328P (Arduino Uno) | ESP32 (WROOM-32) |
|---|---|---|
| SAR Resolution | 10-bit (1024 steps) | 12-bit (4096 steps) |
| Max Source Impedance | < 10 kΩ (to charge 14pF cap) | High impedance tolerant (internal op-amp buffer) |
| Usable Linear Range | 0.0V to 5.0V (Highly linear) | ~0.15V to ~3.1V (Non-linear rails) |
| Recommended Sample Time | 1.5 to 13 ADC clock cycles | Configurable via setSampleBits() |
If you connect a high-impedance voltage divider (e.g., two 1MΩ resistors) to an ATmega328P analog pin, the internal 14pF sample-and-hold capacitor will not have enough time to charge to the actual input voltage during the sampling window. The Microchip ATmega328P Datasheet explicitly mandates a source impedance of 10kΩ or less. If you violate this, your successive approximation ADC converter will output artificially low digital counts that drift based on the previous channel read (crosstalk). The fix is to add a 100nF ceramic capacitor directly at the ADC pin to act as an external charge reservoir, or buffer the signal with an op-amp.
Frequently Asked Questions
Why does my 12-bit ADC read 4095 when the input is only 3.2V?
This is the classic ESP32 SAR ADC clipping issue. The internal amplifier saturates before reaching the true 3.3V rail. To fix this, design your voltage dividers so the absolute maximum expected voltage maps to 3.1V at the GPIO pin, leaving a 0.2V safety margin at the top of the scale.
Can I improve the resolution of a 10-bit ADC without buying a new chip?
Yes, through oversampling and decimation. If you take 16 rapid, consecutive readings of a stable DC signal and average them, you effectively gain 1 bit of resolution (turning a 10-bit ADC into an 11-bit ADC). This requires adding a small amount of intentional dither (noise) to the signal, which the averaging process then filters out, a technique heavily documented in Espressif's Technical Reference Manuals for signal conditioning.
Does the SAR ADC consume power while converting?
Yes, but only during the active conversion cycles. A successive approximation ADC converter draws a brief spike of current (often a few hundred microamps) while the internal DAC toggles and the comparator fires. Once the conversion is complete and the result is latched into the data register, the ADC circuitry can be put to sleep. For battery-powered ESP32 projects, always trigger the ADC, read the value, and immediately call adc_power_off() to eliminate this parasitic drain.
